Youn Sung Park

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 2

Top Topics

Distributed Video Coding

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

David Garrett, Youn Sung Park, Seongjong Kim, Jay Sharma, Wenbin Huang, Majid Shaghaghi, Vinay Parthasarathy, Stephen Gibellini, Stephen Bailey, Mallik Moturi, Pieter Vorenkamp, Kurt Busch, Jeremy Holleman, Behrooz Javid, Alireza Yousefi, Mohsen Judy, Atul Gupta
A 1mW Always-on Computer Vision Deep Learning Neural Decision Processor. ISSCC (2023)
Youn Sung Park, Yaoyu Tao, Zhengya Zhang
A Fully Parallel Nonbinary LDPC Decoder With Fine-Grained Dynamic Clock Gating. IEEE J. Solid State Circuits 50 (2) (2015)
Youn Sung Park, Yaoyu Tao, Shuanghong Sun, Zhengya Zhang
A 4.68Gb/s belief propagation polar decoder with bit-splitting register file. VLSIC (2014)
Youn Sung Park, David T. Blaauw, Dennis Sylvester, Zhengya Zhang
Low-Power High-Throughput LDPC Decoder Using Non-Refresh Embedded DRAM. IEEE J. Solid State Circuits 49 (3) (2014)
Zhiyoong Foo, David Devescery, Mohammad Hassan Ghaed, Inhee Lee, Abishek Madhavan, Youn Sung Park, Aswin S. Rao, Zach Renner, Nathan Roberts, Aaron Schulman, Vikas Vinay, Michael Wieckowski, Dongmin Yoon, Cliff Schmidt, Thomas Schmid, Prabal Dutta, Peter M. Chen, David T. Blaauw
A Low-Cost Audio Computer for Information Dissemination Among Illiterate People Groups. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2013)
Youn Sung Park, Yaoyu Tao, Zhengya Zhang
A 1.15Gb/s fully parallel nonbinary LDPC decoder with fine-grained dynamic clock gating. ISSCC (2013)
Zhiyoong Foo, David Devescery, Mohammad Hassan Ghaed, Inhee Lee, Abishek Madhavan, Youn Sung Park, Aswin S. Rao, Zach Renner, Nathan Roberts, Aaron Schulman, Vikas Vinay, Michael Wieckowski, Dongmin Yoon, Cliff Schmidt, Thomas Schmid, Prabal Dutta, Peter M. Chen, David T. Blaauw
A low-cost audio computer for information dissemination among illiterate people groups. CICC (2012)
Yaoyu Tao, Youn Sung Park, Zhengya Zhang
High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders. ISCAS (2012)
Haoran Li, Youn Sung Park, Zhengya Zhang
Reconfigurable architecture and automated design flow for rapid FPGA-based LDPC code emulation. FPGA (2012)
Youn Sung Park, David T. Blaauw, Dennis Sylvester, Zhengya Zhang
38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM. VLSIC (2012)
Zhiyoong Foo, David Devescery, Thomas Schmid, Nathan Clark, R. Frank, Mohammad Hassan Ghaed, Ye-Sheng Kuo, Inhee Lee, Youn Sung Park, Zach Renner, Nathaniel Slottow, Vikas Vinay, Michael Wieckowski, Dongmin Yoon, Cliff Schmidt, David T. Blaauw, Peter M. Chen, Prabal Dutta
A case for custom silicon in enabling low-cost information technology for developing regions. ACM DEV (2010)