38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM.
Youn Sung ParkDavid T. BlaauwDennis SylvesterZhengya ZhangPublished in: VLSIC (2012)
Keyphrases
- ldpc codes
- low density parity check
- distributed video coding
- turbo codes
- distributed source coding
- decoding algorithm
- error correction
- power consumption
- low complexity
- message passing
- embedded dram
- high speed
- channel coding
- error resilience
- dynamic random access memory
- data structure
- random access memory
- cmos technology
- low power
- motion estimation