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Cheng-Hsun Lu
ORCID
Publication Activity (10 Years)
Years Active: 2019-2024
Publications (10 Years): 4
Top Topics
Optimal Solution
Verilog Hdl
Digital Signal Processor
Fully Integrated
Top Venues
A-SSCC
VLSI Technology and Circuits
IEEE Trans. Computers
IEEE J. Solid State Circuits
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Publications
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Wei Tang
,
Sung-Gun Cho
,
Tim Tri Hoang
,
Jacob Botimer
,
Wei Qiang Zhu
,
Ching-Chi Chang
,
Cheng-Hsun Lu
,
Junkang Zhu
,
Yaoyu Tao
,
Tianyu Wei
,
Naomi Kavi Motwani
,
Mani Yalamanchi
,
Ramya Yarlagadda
,
Sirisha Rani Kale
,
Mark Flanigan
,
Allen Chan
,
Thungoc Tran
,
Sergey Y. Shumarayev
,
Zhengya Zhang
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.
IEEE J. Solid State Circuits
59 (4) (2024)
Jie-Fang Zhang
,
Cheng-Hsun Lu
,
Zhengya Zhang
TetriX: Flexible Architecture and Optimal Mapping for Tensorized Neural Network Processing.
IEEE Trans. Computers
73 (5) (2024)
Wei Tang
,
Sung-Gun Cho
,
Tim Tri Hoang
,
Jacob Botimer
,
Wei Qiang Zhu
,
Ching-Chi Chang
,
Cheng-Hsun Lu
,
Junkang Zhu
,
Yaoyu Tao
,
Tianyu Wei
,
Naomi Kavi Motwani
,
Mani Yalamanchi
,
Ramya Yarlagadda
,
Sirisha Kale
,
Mark Flannigan
,
Allen Chan
,
Thungoc Tran
,
Sergey Y. Shumarayev
,
Zhengya Zhang
AIB 2.0 Interface to Provide Versatile Workload Acceleration.
VLSI Technology and Circuits
(2023)
Cheng-Hsun Lu
,
Yi-Chung Wu
,
Chia-Hsiang Yang
A 2.25 TOPS/W Fully-Integrated Deep CNN Learning Processor with On-Chip Training.
A-SSCC
(2019)