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Weiwei Shi
ORCID
Publication Activity (10 Years)
Years Active: 2008-2022
Publications (10 Years): 15
Top Topics
Functional Decomposition
Low Power
Logic Circuits
Selecting Relevant Features
Top Venues
ASICON
IEEE Trans. Circuits Syst. II Express Briefs
ICECS
SoCC
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Publications
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Yongqian Su
,
Weiwei Shi
,
Lizhi Hu
,
Suixing Zhuang
Implementation of SVM-Based Low Power EEG Signal Classification Chip.
IEEE Trans. Circuits Syst. II Express Briefs
69 (10) (2022)
Weiwei Shi
,
Lizhi Hu
,
Yuan Liu
,
Sunbin Deng
,
Yuming Xu
,
Hoi-Sing Kwok
,
Rongsheng Chen
Arithmetic and Logic Circuits Based on ITO-Stabilized ZnO TFT for Transparent Electronics.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (1) (2022)
Yongqian Su
,
Yang Hong
,
Weiwei Shi
,
Mengtao Ye
,
Lizhi Hu
Design of basic block of neural signal detection chip.
ICTA
(2020)
Lizhi Hu
,
Yang Hong
,
Weiwei Shi
,
Mengtao Ye
,
Yongqian Su
Pseudo-NMOS Logic Circuits using ITO-Stabilized ZnO TFTs.
ICTA
(2020)
Zhiyong Chen
,
Weiwei Shi
,
Guoqiang Xiong
,
Junwei Yang
,
Yuan Xu
A 63.3ps TDC Measurement System Based on FPGA for Pulsed Laser Ranging.
ASICON
(2019)
Weiwei Shi
,
Yuan Xu
,
Chiu-Sing Choy
,
Zhiyong Chen
,
Junwei Yang
,
Robert K. F. Teng
,
Mei Jiang
,
X. Deng
A 0.4 V 298 nJ/op Neural Signal Spectral Feature Extraction Module With Novel Approximate MACs and Custom Compressors.
IEEE Trans. Circuits Syst. II Express Briefs
(10) (2019)
Junwei Yang
,
Weiwei Shi
,
Zhiyu Huang
,
Yuan Xu
,
Yanghao Zheng
,
Xuanbin Fang
A Optimized PPD CMOS Pixel with 26.09 % Transfer Efficiency Improvement and 43.34 % Crosstalk Suppression for I-ToF Application.
ASICON
(2019)
Weiwei Shi
,
An Pan
Mixed Design of SPAD Array Based TOF for Depth Camera and Unmanned Vehicle Applications.
SMACD
(2018)
Weiwei Shi
,
An Pan
,
Shi Yu
,
Chiu-sing Choy
A Subthreshold Baseband Processor Core Design With Custom Modules and Cells for Passive RFID Tags.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
37 (1) (2018)
Hongda Wang
,
Weiwei Shi
,
Chiu-Sing Choy
Hardware Design of Real Time Epileptic Seizure Detection Based on STFT and SVM.
IEEE Access
6 (2018)
Weiwei Shi
,
Hai-Peng Wang
,
Chiu-Sing Choy
,
Junwei Yang
,
Mei Jiang
,
Robert K. F. Teng
,
Mingcheng Zhu
A 0.35 V 376 Mb/s Configurable Long Integer Multiplier for Subthreshold Encryption.
IEEE Trans. Circuits Syst. II Express Briefs
(10) (2018)
Hongda Wang
,
Weiwei Shi
,
Chiu-sing Choy
Integrating channel selection and feature selection in a real time epileptic seizure detection system.
EMBC
(2017)
Weiwei Shi
,
Zhao Guangdong
,
Oliver Chiu-sing Choy
Subthreshold Passive RFID Tag's Baseband Processor Core Design with Custom Modules and Cells.
ISVLSI
(2016)
Weiwei Shi
,
Chiu-sing Choy
A 0.4V 320Mb/s 28.7µW 1024-bit configurable multiplier for subthreshold SOC encryption.
SoCC
(2016)
Weiwei Shi
,
Linqing Fu
,
Chiu-sing Choy
Subthreshold passive RFID tag's baseband processor core design with custom modules and cells.
ICECS
(2015)
Weiwei Shi
,
Oliver Chiu-sing Choy
Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells.
ICECS
(2014)
Weiwei Shi
,
Oliver Chiu-sing Choy
A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below.
SoCC
(2014)
Weiwei Shi
,
Oliver Chiu-sing Choy
,
Robert K. F. Teng
Key component designs of subthreshold baseband processors in passive RF device.
ASICON
(2013)
Liwei Gong
,
Yuan Xu
,
Zhi Zhang
,
Weiwei Shi
,
Robert K. F. Teng
An open 45nm PD-SOI standard cell library based on verified BSIM SOI spice model with predictive technology.
ASICON
(2013)
Weiwei Shi
,
Oliver Chiu-sing Choy
A process-compatible passive RFID tag's digital design for subthreshold operation.
ICECS
(2012)
Ka Nang Leung
,
Chiu-sing Choy
,
Kong-Pang Pun
,
Lincoln Lai Kan Leung
,
Jianping Guo
,
Yuen Sum Ng
,
Chi Fat Chan
,
Weiwei Shi
,
Yang Hong
,
Marco Ho
,
Ki-Leung Mak
,
Yanqing Ai
RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology.
J. Low Power Electron.
6 (1) (2010)
Chi Fat Chan
,
Weiwei Shi
,
Kong-Pang Pun
,
Lincoln Lai Kan Leung
,
Ka Nang Leung
,
Oliver Chiu-sing Choy
A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders.
ISCAS
(2009)
Yang Hong
,
Chi Fat Chan
,
Jianping Guo
,
Yuen Sum Ng
,
Weiwei Shi
,
Lincoln Lai Kan Leung
,
Ka Nang Leung
,
Chiu-sing Choy
,
Kong-Pang Pun
Design of passive UHF RFID tag in 130nm CMOS technology.
APCCAS
(2008)