A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below.
Weiwei ShiOliver Chiu-sing ChoyPublished in: SoCC (2014)
Keyphrases
- digital circuits
- circuit design
- mixed signal
- focal plane
- low voltage
- floating gate
- cmos technology
- data flow
- evolvable hardware
- silicon on insulator
- model based diagnosis
- high speed
- low cost
- finite state machines
- low power
- functional decomposition
- metal oxide semiconductor
- power supply
- analog vlsi
- power consumption
- decision diagrams
- infrared
- delay insensitive
- nm technology
- parallel processing
- steady state