Wei-Han Yu

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 25

Top Topics

Convolutional Neural Network

Keyword Spotting

Feature Extractor

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Yaozhong Ou, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu
A 119.64 GOPs/W FPGA-Based ResNet50 Mixed-Precision Accelerator Using the Dynamic DSP Packing. IEEE Trans. Circuits Syst. II Express Briefs 71 (5) (2024)
Moon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. IEEE J. Solid State Circuits 59 (4) (2024)
Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS. IEEE J. Solid State Circuits 59 (2) (2024)
Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM. ISSCC (2024)
Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui Paulo Martins
A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power. ISSCC (2023)
Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier. ISSCC (2023)
Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs 70 (1) (2023)
Moon Hyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. VLSI Technology and Circuits (2023)
Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM. IEEE J. Solid State Circuits 58 (11) (2023)
Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting. APCCAS (2022)
Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS. IEEE J. Solid State Circuits 57 (11) (2022)
Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS. ISSCC (2022)
Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak, Rui Paulo Martins, Boris Murmann
A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory. MWSCAS (2021)
Jixuan Li, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs 68 (9) (2021)
Jixuan Li, Jiabao Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement. A-SSCC (2021)
Chao Fan, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2019)
Shiheng Yang, Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS. IEEE J. Solid State Circuits 54 (5) (2019)
Wei-Han Yu, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2018)
Xingqiang Peng, Jun Yin, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter With 34.7% Peak System Efficiency. IEEE Trans. Circuits Syst. II Express Briefs (9) (2018)
Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui Paulo Martins
A 0.18-V 382-µW Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS. IEEE J. Solid State Circuits 53 (6) (2018)
Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS. ISSCC (2018)
Wei-Han Yu, Haidong Yi, Pui-In Mak, Jun Yin, Rui Paulo Martins
24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS. ISSCC (2017)
Wei-Han Yu, Xingqiang Peng, Pui-In Mak, Rui Paulo Martins
A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2017)
Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, Rui Paulo Martins
. IEEE J. Solid State Circuits 52 (6) (2017)
Chak-Fong Cheang, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2015)
Wei-Han Yu, Chak-Fong Cheang, Pui-In Mak, Weng-Fai Cheng, Ka-Fai Un, U-Wai Lok, Rui Paulo Martins
A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware. IEEE Trans. Circuits Syst. II Express Briefs (8) (2013)
Yinsidi Jiao, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
A dynamic-range-improved 2.4GHz WLAN class-E PA combining PWPM and cascode modulation. APCCAS (2012)