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A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS.

Chao FanWei-Han YuPui-In MakRui Paulo Martins
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
  • high speed
  • low cost
  • wireless sensor networks
  • image quality
  • low power