Wangqi Qiu

Publication Activity (10 Years)

Years Active: 2003-2016
Publications (10 Years): 1

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Texas A&M University, College Station, USA (PHD)

Education History

Texas A&M University, College Station, USA

PHD

Publications

Yuhan Zhou, Yong Zhang, Vivek Sarin, Wangqi Qiu, Weiping Shi
Macro Model of Advanced Devices for Parasitic Extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (10) (2016)
Wangqi Qiu, D. M. H. Walker, Neil Simpson, Divya Reddy, Anthony Moore
Comparison of Delay Tests on Silicon. ITC (2006)
Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
Longest-path selection for delay test under process variation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (12) (2005)
Jing Wang, Xiang Lu, Wangqi Qiu, Ziding Yue, Steve Fancler, Weiping Shi, D. M. H. Walker
Static Compaction of Delay Tests Considering Power Supply Noise. VTS (2005)
Jing Wang, Ziding Yue, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker
A vector-based approach for power supply noise analysis in test compaction. ITC (2005)
Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
PARADE: PARAmetric Delay Evaluation under Process Variation. ISQED (2004)
Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
A Circuit Level Fault Model for Resistive Shorts of MOS Gate Oxide. MTV (2004)
Wangqi Qiu, Weiping Shi
Minimum moment Steiner trees. SODA (2004)
Wangqi Qiu, Xiang Lu, Jing Wang, Zhuo Li, D. M. H. Walker, Weiping Shi
A Statistical Fault Coverage Metric for Realistic Path Delay Faults. VTS (2004)
Wangqi Qiu, Jing Wang, D. M. H. Walker, Divya Reddy, Zhuo Li, Weiping Shi, Hari Balachandran
K Longest Paths Per Gate (KLPG) Test Generation for Scan-Based Sequential Circuits. ITC (2004)
Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi
Longest path selection for delay test under process variation. ASP-DAC (2004)
Zhuo Li, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker
A Circuit Level Fault Model for Resistive Opens and Bridges. VTS (2003)
Wangqi Qiu, Xiang Lu, Zhuo Li, D. M. H. Walker, Weiping Shi
CodSim -- A Combined Delay Fault Simulator. DFT (2003)
Zhuo Li, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker
A circuit level fault model for resistive bridges. ACM Trans. Design Autom. Electr. Syst. 8 (4) (2003)
Wangqi Qiu, D. M. H. Walker
An Efficient Algorithm for Finding the K Longest Testable Paths Through Each Gate in a Combinational Circuit. ITC (2003)
Wangqi Qiu, D. M. H. Walker
Testing the Path Delay Faults of ISCAS85 Circuit c6288. MTV (2003)

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Publication Activity (10 Years)

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Wangqi Qiu