Ulrich Kleine

Publication Activity (10 Years)

Years Active: 1994-2009
Publications (10 Years): 0

Publications

Björn Lipka, Ulrich Kleine, Christoph Scheytt, Klaus Schmalz
Design of a complementary folded-cascode operational amplifier. SoCC (2009)
Björn Lipka, Ulrich Kleine
Design of a Linear Power Amplifier with +/-1.5V Power Supply Using ALADIN. PATMOS (2007)
Lihong Zhang, Ulrich Kleine, Yingtao Jiang
An automated design tool for analog layouts. IEEE Trans. Very Large Scale Integr. Syst. 14 (8) (2006)
Lihong Zhang, Rabin Raut, Yingtao Jiang, Ulrich Kleine
Placement Algorithm in Analog-Layout Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Lihong Zhang, Rabin Raut, Yingtao Jiang, Ulrich Kleine, Yoohwan Kim
A hybrid evolutionary analogue module placement algorithm for integrated circuit layout designs. Int. J. Circuit Theory Appl. 33 (6) (2005)
Lihong Zhang, Rabin Raut, Yingtao Jiang, Ulrich Kleine, Yoohwan Kim
Macro-cell placement for analog physical designs using a hybrid genetic algorithm with simulated annealing. Integr. Comput. Aided Eng. 12 (4) (2005)
Lihong Zhang, Ulrich Kleine
A novel analog layout synthesis tool. ISCAS (5) (2004)
Falk Roewer, Ulrich Kleine, Klaus-Eberhard Salzwedel, Felix Mednikov, Chhrisitan Pfaffinger, Martin Sellen
A programmable inductive position sensor interface circuit. Integr. 38 (2) (2004)
Falk Roewer, Ulrich Kleine
A novel class of complementary folded-cascode opamps for low voltage. IEEE J. Solid State Circuits 37 (8) (2002)
Ulrich Kleine, Lihong Zhang, Markus Wolf
Mismatch optimization for analog circuits using the DesignAssistant. ICECS (2002)
Falk Roewer, Ulrich Kleine
A novel algorithm for detection of rapid approaching objects. ICASSP (2002)
Lihong Zhang, Ulrich Kleine
A genetic approach to analog module placement with simulated annealing. ISCAS (1) (2002)
Christian Paulus, Ralf Brederlow, Ulrich Kleine, Roland Thewes
An efficient and precise design method to optimize device areas in mismatch and flicker-noise sensitive analog circuits. ICECS (2001)
Lihong Zhang, Ulrich Kleine, Tobias Rudolph, Markus Wolf
A new design rule description for automated layout tools. ICECS (2000)
Christian Paulus, Ulrich Kleine, Roland Thewes
Area Optimization of Analog Circuits Considering Matching Constraints. DATE (2000)
Markus Wolf, Ulrich Kleine
Reliability driven module generation for analog layouts. ISCAS (6) (1999)
Thomas Pasch, Ulrich Kleine, R. Klinke
A low voltage differential OpAmp with novel common mode feedback. ICECS (1998)
Markus Wolf, Ulrich Kleine
Automatic Topology Optimization for Analog Module Generators. DATE (1998)
Markus Wolf, Ulrich Kleine, Frédéric Schafer
A Novel Design Assistant for Analog Circuits. ASP-DAC (1998)
Markus Wolf, Ulrich Kleine
Application independent module generation in analog layouts. ED&TC (1997)
Gerhard Nebel, Ulrich Kleine, Hans-Jörg Pfleiderer
Large bandwidth BiCMOS operational amplifiers for SC video applications. IEEE J. Solid State Circuits 31 (6) (1996)
Markus Wolf, Ulrich Kleine, Bedrich J. Hosticka
A Novel Analog Module Generator Environment. ED&TC (1996)
Gerhard Nebel, Ulrich Kleine, Hans-Jörg Pfleiderer
Symbolic pole/zero calculation using SANTAFE. IEEE J. Solid State Circuits 30 (7) (1995)
Ulrich Kleine, Johannes Bieger, Heinrich Seifert
A low-noise CMOS preamplifier operating at 4.2 K. IEEE J. Solid State Circuits 29 (8) (1994)