Tosiron Adegbija

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 65

Top Topics

Embedded Systems

Top Venues

ACM Great Lakes Symposium on VLSI

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Alaba Yusuf, Tosiron Adegbija, Dhruv Gajaria
Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey. IEEE Access 12 (2024)
Yuchao Liao, Tosiron Adegbija, Roman Lysecky, Ravi Tandon
Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning. ACM Great Lakes Symposium on VLSI (2024)
Dhruv Gajaria, Tosiron Adegbija, Kevin Antony Gomez
CHIME: Energy-Efficient STT-RAM-based Concurrent Hierarchical In-Memory Processing. CoRR (2024)
Yuchao Liao, Tosiron Adegbija, Roman Lysecky, Ravi Tandon
Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning. CoRR (2024)
Dhruv Gajaria, Tosiron Adegbija
ARC: DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors. CoRR (2024)
Ilkin Aliyev, Tosiron Adegbija
PULSE: Parametric Hardware Units for Low-power Sparsity-Aware Convolution Engine. ISCAS (2024)
Ping Chang, Tosiron Adegbija, Yuchao Liao, Claudio Talarico, Ao Li, Janet Roveda
Deep Inverse Design for High-Level Synthesis. CoRR (2024)
Dhruv Gajaria, Kevin Antony Gomez, Tosiron Adegbija
STT-RAM-based Hierarchical In-Memory Computing. CoRR (2024)
Ilkin Aliyev, Tosiron Adegbija
Fine-Tuning Surrogate Gradient Learning for Optimal Hardware Performance in Spiking Neural Networks. CoRR (2024)
Yuchao Liao, Tosiron Adegbija, Roman Lysecky
A high-level synthesis approach for precisely-timed, energy-efficient embedded systems. CoRR (2024)
Ilkin Aliyev, Tosiron Adegbija
PULSE: Parametric Hardware Units for Low-power Sparsity-Aware Convolution Engine. CoRR (2024)
Dhruv Gajaria, Kyle Kuan, Tosiron Adegbija
SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning. CoRR (2024)
Dhruv Gajaria, Kevin Antony Gomez, Tosiron Adegbija
STT-RAM-Based Hierarchical in-Memory Computing. IEEE Trans. Parallel Distributed Syst. 35 (9) (2024)
Ilkin Aliyev, Tosiron Adegbija
Fine-Tuning Surrogate Gradient Learning for Optimal Hardware Performance in Spiking Neural Networks. DATE (2024)
Tosiron Adegbija
jazznet: A Dataset of Fundamental Piano Patterns for Music Audio Machine Learning Research. CoRR (2023)
Ilkin Aliyev, Kama Svoboda, Tosiron Adegbija
Design Space Exploration of Sparsity-Aware Application-Specific Spiking Neural Network Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 13 (4) (2023)
Tosiron Adegbija
Jazznet: A Dataset of Fundamental Piano Patterns for Music Audio Machine Learning Research. ICASSP (2023)
Ilkin Aliyev. Kama Svoboda, Tosiron Adegbija
Design Space Exploration of Sparsity-Aware Application-Specific Spiking Neural Network Accelerators. CoRR (2023)
Yuchao Liao, Tosiron Adegbija, Roman Lysecky
Efficient System-Level Design Space Exploration for High-Level Synthesis Using Pareto-Optimal Subspace Pruning. ASP-DAC (2023)
Dhruv Gajaria, Tosiron Adegbija
Evaluating the performance and energy of STT-RAM caches for real-world wearable workloads. Future Gener. Comput. Syst. 136 (2022)
Yuchao Liao, Tosiron Adegbija, Roman Lysecky
A high-level synthesis approach for precisely-timed, energy-efficient embedded systems. Sustain. Comput. Informatics Syst. 35 (2022)
Kyle Kuan, Tosiron Adegbija
A Study of STTRAM-based Page Walker Caches for Energy-Efficient Address Translation. ISVLSI (2022)
Dhruv Gajaria, Tosiron Adegbija
Exploring Domain-Specific Architectures for Energy-Efficient Wearable Computing. J. Signal Process. Syst. 94 (6) (2022)
Dhruv Gajaria, Kevin Antony Gomez, Tosiron Adegbija
A Study of STT-RAM-based In-Memory Computing Across the Memory Hierarchy. ICCD (2022)
Ankur Limaye, Antonino Tumeo, Tosiron Adegbija
Energy characterization of graph workloads. Sustain. Comput. Informatics Syst. 29 (Part) (2021)
Ankur Limaye, Tosiron Adegbija
DOSAGE: Generating Domain-Specific Accelerators for Resource-Constrained Computing. ISLPED (2021)
Keeley Criswell, Tosiron Adegbija
A Survey of Phase Classification Techniques for Characterizing Variable Application Behavior. IEEE Trans. Parallel Distributed Syst. 31 (1) (2020)
Kyle Kuan, Tosiron Adegbija
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Kyle Kuan, Tosiron Adegbija
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches. ICCD (2020)
Chenxi Dai, Tosiron Adegbija
CONDENSE: A Moving Target Defense Approach for Mitigating Cache Side-Channel Attacks. IEEE Consumer Electron. Mag. 9 (3) (2020)
Renato Cordeiro, Dhruv Gajaria, Ankur Limaye, Tosiron Adegbija, Nima Karimian, Fatemeh Tehranipoor
ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Yasuhiro Takahashi, Tosiron Adegbija, Linga Reddy Cenkeramaddi
Message from the Technical Program Chairs iSES 2020. iSES (2020)
Kyle Kuan, Tosiron Adegbija
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches. CoRR (2020)
Dhruv Gajaria, Tosiron Adegbija
ARC: DVFS-aware asymmetric-retention STT-RAM caches for energy-efficient multicore processors. MEMSYS (2019)
Kyle Kuan, Tosiron Adegbija
Energy and Performance Analysis of STTRAM Caches for Mobile Applications. CoRR (2019)
Tosiron Adegbija, Roman Lysecky, Vinu Vijay Kumar
Right-Provisioned IoT Edge Computing: An Overview. ACM Great Lakes Symposium on VLSI (2019)
Kyle Kuan, Tosiron Adegbija
HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems. CoRR (2019)
Kyle Kuan, Tosiron Adegbija
HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems. IEEE Trans. Computers 68 (11) (2019)
Elnaz Tavakoli Yazdi, Ankur Limaye, Ali Akoglu, Tosiron Adegbija, Adam Buntzman
Bit-Wise and Multi-GPU Implementations of the DNA Recombination Algorithm. HiPC (2019)
Kyle Kuan, Tosiron Adegbija
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design. CoRR (2019)
Dhruv Gajaria, Kyle Kuan, Tosiron Adegbija
SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning. IGSC (2019)
Kyle Kuan, Tosiron Adegbija
MirrorCache: An Energy-Efficient Relaxed Retention L1 STTRAM Cache. ACM Great Lakes Symposium on VLSI (2019)
Keeley Criswell, Tosiron Adegbija
A Survey of Phase Classification Techniques for Characterizing Variable Application Behavior. CoRR (2019)
Mohamad Hammam Alsafrjalani, Tosiron Adegbija, Lokesh Ramamoorthi
Evaluating Design Space Subsetting for Multi-Objective Optimization in Configurable Systems. ISQED (2019)
Kyle Kuan, Tosiron Adegbija
Energy and Performance Analysis of STTRAM Caches for Mobile Applications. MCSoC (2019)
Tosiron Adegbija, Ann Gordon-Ross
PhLock: A Cache Energy Saving Technique Using Phase-Based Cache Locking. IEEE Trans. Very Large Scale Integr. Syst. 26 (1) (2018)
Jeremiah Pate, Tosiron Adegbija
AMELIA: An application of the Internet of Things for aviation safety. CCNC (2018)
Tosiron Adegbija, Ann Gordon-Ross
: Temperature-Aware Dynamic Cache Optimization for Embedded Systems. Comput. 7 (1) (2018)
Islam Badreldin, Ann Gordon-Ross, Tosiron Adegbija, Mohamad Hammam Alsafrjalani
Realizing Closed-Loop, Online Tuning and Control for Configurable-Cache Embedded Systems: Progress and Challenges. ISVLSI (2018)
Kyle Kuan, Tosiron Adegbija
LARS: Logically adaptable retention time STT-RAM cache for embedded systems. DATE (2018)
Mohamad Hammam Alsafrjalani, Tosiron Adegbija
TaSaT: Thermal-Aware Scheduling and Tuning Algorithm for Heterogeneous and Configurable Embedded Systems. ACM Great Lakes Symposium on VLSI (2018)
Ankur Limaye, Tosiron Adegbija
HERMIT: A Benchmark Suite for the Internet of Medical Things. IEEE Internet Things J. 5 (5) (2018)
Tosiron Adegbija, Anita Rogacs, Chandrakant Patel, Ann Gordon-Ross
Microprocessor Optimizations for the Internet of Things: A Survey. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (1) (2018)
Ankur Limaye, Tosiron Adegbija
A Workload Characterization of the SPEC CPU2017 Benchmark Suite. ISPASS (2018)
Chenxi Dai, Tosiron Adegbija
Exploiting Configurability as a Defense against Cache Side Channel Attacks. ISVLSI (2017)
Sam Gianelli, Tosiron Adegbija
PACT: Priority-Aware Phase-Based Cache Tuning for Embedded Systems. ISVLSI (2017)
Sam Gianelli, Edward Richter, Diego Jiménez, Hugo Valdez, Tosiron Adegbija, Ali Akoglu
Application-Specific Autonomic Cache Tuning for General Purpose GPUs. ICCAC (2017)
Ankur Limaye, Tosiron Adegbija
A Workload Characterization for the Internet of Medical Things (IoMT). ISVLSI (2017)
Tosiron Adegbija, Ravi Tandon
Coding for Efficient Caching in Multicore Embedded Systems. ISVLSI (2017)
Tosiron Adegbija
Exploring Configurable Non-Volatile Memory-based Caches for Energy-Efficient Embedded Systems. ACM Great Lakes Symposium on VLSI (2016)
Tosiron Adegbija, Ann Gordon-Ross
Temperature-aware Dynamic Optimization of Embedded Systems. CoRR (2016)
Tosiron Adegbija, Ann Gordon-Ross, Arslan Munir
Phase distance mapping: a phase-based cache tuning methodology for embedded systems. CoRR (2016)
Tosiron Adegbija, Anita Rogacs, Chandrakant Patel, Ann Gordon-Ross
Microprocessor Optimizations for the Internet of Things. CoRR (2016)
Tosiron Adegbija, Ann Gordon-Ross
Phase-Based Dynamic Instruction Window Optimization for Embedded Systems. ISVLSI (2016)
Tosiron Adegbija, Ann Gordon-Ross
Phase-based Cache Locking for Embedded Systems. ACM Great Lakes Symposium on VLSI (2015)
Tosiron Adegbija, Ann Gordon-Ross
Thermal-aware phase-based tuning of embedded systems. ACM Great Lakes Symposium on VLSI (2014)
Tosiron Adegbija, Ann Gordon-Ross
Dynamic Phase-Based Optimization of Embedded Systems. ISVLSI (2014)
Tosiron Adegbija, Ann Gordon-Ross, Arslan Munir
Phase distance mapping: a phase-based cache tuning methodology for embedded systems. Des. Autom. Embed. Syst. 18 (3-4) (2014)
Tosiron Adegbija, Ann Gordon-Ross, Marisha Rawlins
Analysis of cache tuner architectural layouts for multicore embedded systems. IPCCC (2014)
Tosiron Adegbija, Ann Gordon-Ross
Exploiting dynamic phase distance mapping for phase-based tuning of embedded systems. ICCD (2013)
Tosiron Adegbija, Ann Gordon-Ross, Arslan Munir
Dynamic phase-based tuning for embedded systems using phase distance mapping. ICCD (2012)