Toru Koizumi

Publication Activity (10 Years)

Years Active: 2018-2023
Publications (10 Years): 13

Top Topics

Instruction Set

Level Parallelism

Code Generation

Top Venues

Publications

Reoma Matsuo, Toru Koizumi, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya
TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA. DATE (2023)
Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors. MICRO (2023)
Taichi Amano, Junichiro Kadomoto, Satoshi Mitsuno, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
An Out-of-Order Superscalar Processor Using STRAIGHT Architecture in 28 nm CMOS. ISCAS (2023)
Shu Sugita, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
A Sound and Complete Algorithm for Code Generation in Distance-Based ISA. CC (2023)
Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
A Principal Factor of Performance in Decoupled Front-End. IEICE Trans. Inf. Syst. 106 (12) (2023)
Toru Koizumi, Tomoki Nakamura, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya
T-SKID: Predicting When to Prefetch Separately from Address Prediction. DATE (2022)
Toru Koizumi, Shu Sugita, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
Compiling and Optimizing Real-world Programs for STRAIGHT ISA. ICCD (2021)
Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
Accurate and Fast Performance Modeling of Processors with Decoupled Front-end. ICCD (2021)
Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
A High-Performance Out-of-Order Soft Processor Without Register Renaming. FPL (2020)
Susumu Mashimo, Koji Inoue, Ryota Shioya, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima
An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor. FPT (2019)
Toru Koizumi, Satoshi Nakae, Akifumi Fukuda, Hidetsugu Irie, Shuichi Sakai
Reduction of Instruction Increase Overhead by STRAIGHT Compiler. CANDAR Workshops (2018)
Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai
STRAIGHT: Hazardless Processor Architecture Without Register Renaming. MICRO (2018)
Junichiro Kadomoto, Toru Koizumi, Akifumi Fukuda, Reoma Matsuo, Susumu Mashimo, Akifumi Fujita, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
An Area-Efficient Out-of-Order Soft-Core Processor Without Register Renaming. FPT (2018)