Thorsten Jungeblut

ORCID

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 21

Top Venues

Bielefeld University (PHD)

Education History

Bielefeld University

PHD

Publications

Sanaullah, Shamini Koravuna, Ulrich Rückert, Thorsten Jungeblut
A Spike Vision Approach for Multi-object Detection and Generating Dataset Using Multi-core Architecture on Edge Device. EANN (2024)
Sanaullah, Kaushik Roy, Ulrich Rückert, Thorsten Jungeblut
A Hybrid Spiking-Convolutional Neural Network Approach for Advancing Machine Learning Models. CoRR (2024)
Sanaullah, Hasina Attaullah, Thorsten Jungeblut
The Next-Gen Interactive Runtime Simulator for Neural Network Programming. Programming (2024)
Sanaullah, Shamini Koravuna, Ulrich Rückert, Thorsten Jungeblut
Design-Space Exploration of SNN Models using Application-Specific Multi-Core Architectures. CoRR (2024)
Sanaullah, Shamini Koravuna, Ulrich Rückert, Thorsten Jungeblut
Exploring spiking neural networks: a comprehensive analysis of mathematical models and applications. Frontiers Comput. Neurosci. 17 (2023)
Sanaullah, Shamini Koravuna, Ulrich Rückert, Thorsten Jungeblut
Streamlined Training of GCN for Node Classification with Automatic Loss Function and Optimizer Selection. EANN (2023)
Shamini Koravuna, Sanaullah, Thorsten Jungeblut, Ulrich Rückert
Digit Recognition Using Spiking Neural Networks on FPGA. IWANN (1) (2023)
Shamini Koravuna, Ulrich Rückert, Thorsten Jungeblut
Evaluation of Spiking Neural Nets-Based Image Classification Using the Runtime Simulator RAVSim. Int. J. Neural Syst. 33 (9) (2023)
Justin Baudisch, Birte Richter, Thorsten Jungeblut
A Framework for Learning Event Sequences and Explaining Detected Anomalies in a Smart Home Environment. Künstliche Intell. 36 (3) (2022)
Sanaullah, Shamini Koravuna, Ulrich Rückert, Thorsten Jungeblut
SNNs Model Analyzing and Visualizing Experimentation Using RAVSim. EANN (2022)
Michael Adams, Sadok Ben-Salem, Zahidul Islam, Arne Vogelsang, Thorsten Jungeblut, Ulrich Rückert, Ivan Volosyak, Mihaly Benda, Abdul Saboor, André Frank Krause, Aya Rezeika, Felix Gembler, Piotr Stawicki, Marc Hesse, Kai Essig
Towards an SSVEP-BCI Controlled Smart Home. SMC (2019)
Christian Klarhorst, Martin Flasskamp, Johannes Ax, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rückert
Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems. CoRR (2018)
Neela Gayen, Johannes Ax, Martin Flasskamp, Christian Klarhorst, Thorsten Jungeblut, Maolin Tang, Wayne Kelly
Scalable Mapping of Streaming Applications onto MPSoCs Using Optimistic Mixed Integer Linear Programming. PDP (2018)
Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel Jiménez-González, Carlos Álvarez, Behzad Salami, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Micha vor dem Berge, Gunnar Billung-Meyer, Stefan Krupop, Wolfgang Christmann, Frank Klawonn, Amani Mihklafi, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Vesna Nowack, Christof Fetzer, Jens Hagemeyer, Thorsten Jungeblut, Nils Kucza, Martin Kaiser, Mario Porrmann, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber
LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for heterogeneous computing. CF (2018)
Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel Jiménez-González, Carlos Álvarez, Behzad Salami, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Micha vor dem Berge, Gunnar Billung-Meyer, Stefan Krupop, Wolfgang Christmann, Frank Klawonn, Amani Mihklafi, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Elad Hadar, Yoav Etsion, Christof Fetzer, Jens Hagemeyer, Thorsten Jungeblut, Nils Kucza, Martin Kaiser, Mario Porrmann, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber
LEGaTO: first steps towards energy-efficient toolset for heterogeneous computing. SAMOS (2018)
Johannes Ax, Gregor Sievers, Julian Daberkow, Martin Flasskamp, Marten Vohrmann, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rückert
CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Trans. Parallel Distributed Syst. 29 (5) (2018)
Johannes Ax, Nils Kucza, Marten Vohrmann, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert
Comparing Synchronous, Mesochronous and Asynchronous NoCs for GALS Based MPSoCs. MCSoC (2017)
Marc Hesse, André Frank Krause, Ludwig Vogel, Bhavin Chamadiya, Michael Schilling, Thomas Schack, Thorsten Jungeblut
A connected chair as part of a smart home environment. BSN (2017)
Marten Vohrmann, Philippe Geisler, Thorsten Jungeblut, Ulrich Rückert
Design-space exploration of ultra-low power CMOS logic gates in a 28 nm FD-SOI technology. ECCTD (2017)
Timo Korthals, Andreas Skiba, Thilo Krause, Thorsten Jungeblut
Evidenzkarten-basierte Sensorfusion zur Umfelderkennung und Interpretation in der Ernte. GIL Jahrestagung (2016)
Martin Flasskamp, Gregor Sievers, Johannes Ax, Christian Klarhorst, Thorsten Jungeblut, Wayne Kelly, Michael Thies, Mario Porrmann
Performance estimation of streaming applications for hierarchical MPSoCs. RAPIDO@HiPEAC (2016)
Marten Vohrmann, Saikat Chatterjee, Sven Lütkemeier, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert
A 65 nm standard cell library for ultra low-power applications. ECCTD (2015)
Gregor Sievers, Julian Daberkow, Johannes Ax, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert
Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI. MCSoC (2015)
Johannes Ax, Gregor Sievers, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann
System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. NoCArc@MICRO (2015)
Johannes Ax, Aurel Buda, Daniel Schneider, John Harttfel, Lars Dürkop, Thorsten Jungeblut, Jürgen Jasperneite, Andreas Vedral, Ulrich Rückert
Universelle Echtzeit-Ethernet Architektur zur Integration in rekonfigurierbare Automatisierungssysteme. GI-Jahrestagung (2015)
Gregor Sievers, Johannes Ax, Nils Kucza, Martin Flasskamp, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rückert
Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI. ISCAS (2015)
Boris Hübener, Gregor Sievers, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert
CoreVA: A Configurable Resource-Efficient VLIW Processor Architecture. EUC (2014)
Wayne Kelly, Martin Flasskamp, Gregor Sievers, Johannes Ax, Jianing Chen, Christian Klarhorst, Christoph Ragg, Thorsten Jungeblut, Andrew Sorensen
A communication model and partitioning algorithm for streaming applications for an embedded MPSoC. ISSoC (2014)
Thorsten Jungeblut, Boris Hübener, Mario Porrmann, Ulrich Rückert
A systematic approach for optimized bypass configurations for application-specific embedded processors. ACM Trans. Embed. Comput. Syst. 13 (2) (2013)
Gregor Sievers, Peter Christ, Julian Einhaus, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert
Design-space exploration of the configurable 32 bit VLIW processor CoreVA for signal processing applications. NORCHIP (2013)
Sven Lütkemeier, Thorsten Jungeblut, Hans Kristian Otnes Berge, Snorre Aunet, Mario Porrmann, Ulrich Rückert
A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. IEEE J. Solid State Circuits 48 (1) (2013)
Sven Lütkemeier, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert
A 200mV 32b subthreshold processor with adaptive supply voltage control. ISSCC (2012)
Thorsten Jungeblut, Johannes Ax, Mario Porrmann, Ulrich Rückert
A TCMS-based architecture for GALS NoCs. ISCAS (2012)
Thorsten Jungeblut, Gregor Sievers, Mario Porrmann, Ulrich Rückert
Design Space Exploration for Memory Subsystems of VLIW Architectures. NAS (2010)
Thorsten Jungeblut, Ralf Dreesen, Mario Porrmann, Michael Thies, Ulrich Rückert, Uwe Kastens
A Framework for the Design Space Exploration of Software-Defined Radio Applications. MOBILIGHT (2010)
Ralf Dreesen, Thorsten Jungeblut, Michael Thies, Mario Porrmann, Uwe Kastens, Ulrich Rückert
A Synchronization Method for Register Traces of Pipelined Processors. IESS (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Thorsten Jungeblut