Thomas P. Kelliher

Publication Activity (10 Years)

Years Active: 1991-2006
Publications (10 Years): 0

Publications

Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kelliher
HELLAS: a specialized architecture for interactive deformable object modeling. ACM Southeast Regional Conference (2006)
Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kelliher
An Analysis of Iterative Deformable Solid Object Modeling. MSV (2005)
Benjamin Bishop, Thomas P. Kelliher
Specialized hardware for deformable object modeling. IEEE Trans. Circuits Syst. Video Technol. 13 (11) (2003)
Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin
The design of the MGAP-2: a micro-grained massively parallel array. IEEE Trans. Very Large Scale Integr. Syst. 8 (6) (2000)
Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin
SPARTA: Simulation of Physics on a Real-Time Architecture. ACM Great Lakes Symposium on VLSI (2000)
Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin
Hardware/Software Co-design for Real-Time Physical Modeling. IEEE International Conference on Multimedia and Expo (III) (2000)
Benjamin Bishop, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin
Aggressive Dynamic Execution of Decoded Traces. J. VLSI Signal Process. 22 (1) (1999)
Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin
The Design of a Register Renaming Unit. Great Lakes Symposium on VLSI (1999)
Kevin P. Acken, Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin
The MGAP Family of Processor Arrays. Great Lakes Symposium on VLSI (1997)
Raminder Singh Bajwa, Robert Michael Owens, Thomas P. Kelliher
Simultaneous speech segmentation and phoneme recognition using dynamic programming. ICASSP (1996)
Thomas P. Kelliher, Eric Gayles, Robert Michael Owens, Mary Jane Irwin
The MGAP-2: an advanced, massively parallel VLSI signal processor. ICASSP (1995)
Thomas P. Kelliher, Mary Jane Irwin
A systolic VLSI architecture for multi-dimensional transforms. ICASSP (1) (1993)
Robert Michael Owens, Thomas P. Kelliher, Mary Jane Irwin, Mohan Vishwanath, Raminder Singh Bajwa, Wen-Lin Yang
The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. IEEE Trans. Very Large Scale Integr. Syst. 1 (4) (1993)
Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin, TingTing Hwang
ELM-A Fast Addition Algorithm Discovered by a Program. IEEE Trans. Computers 41 (9) (1992)
Robert Michael Owens, Mary Jane Irwin, Thomas P. Kelliher, Mohan Vishwanath, Raminder Singh Bajwa
Implementing a family of high performance, micrograined architectures. ASAP (1992)
Mary Jane Irwin, Robert Michael Owens, Thomas P. Kelliher, Kin-Ki Leung, Mohan Vishwanath
The arithmetic cube II: a second generation VLSI DSP processor. ICASSP (1991)