Thomas Edison Yu

Publication Activity (10 Years)

Years Active: 2007-2010
Publications (10 Years): 0

Publications

Fawnizu Azmadi Hussin, Thomas Edison Yu, Tomokazu Yoneda, Hideo Fujiwara
RedSOCs-3D: Thermal-safe test scheduling for 3D-stacked SOC. APCCAS (2010)
Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara
Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints. ASP-DAC (2009)
Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara
Thermal-Aware Test Access Mechanism and Wrapper Design Optimization for System-on-Chips. IEICE Trans. Inf. Syst. (10) (2008)
Thomas Edison Yu, Tomokazu Yoneda, Danella Zhao, Hideo Fujiwara
Effective Domain Partitioning for Multi-Clock Domain IP Core Wrapper Design under Power Constraints. IEICE Trans. Inf. Syst. (3) (2008)
Thomas Edison Yu, Tomokazu Yoneda, Satoshi Ohtake, Hideo Fujiwara
Identifying Non-Robust Untestable RTL Paths in Circuits with Multi-cycle Paths. ATS (2008)
Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara
Thermal-Safe Test Access Mechanism and Wrapper Co-optimization for System-on-Chip. ATS (2007)
Thomas Edison Yu, Tomokazu Yoneda, Danella Zhao, Hideo Fujiwara
Using Domain Partitioning in Wrapper Design for IP Cores Under Power Constraints. VTS (2007)