Syed M. A. H. Jafri

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 8

Top Topics

Reconfigurable Architecture

Parallel Distributed

Energy Efficiency

Top Venues

Microprocess. Microsystems

Publications

Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani
Clock tree generation by abutment in synchoros VLSI design. Microprocess. Microsystems 102 (2023)
Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani
Clock Tree Generation by Abutment in Synchoros VLSI Design. NorCAS (2021)
Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani
Regional Clock Tree Generation by Abutment in Synchoros VLSI Design. CoRR (2019)
Syed M. A. H. Jafri, Hasan Hassan, Ahmed Hemani, Onur Mutlu
Refresh Triggered Computation: Improving the Energy Efficiency of Convolutional Neural Network Accelerators. CoRR (2019)
Y. Yang, Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis
MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs. PARMA-DITAM@HiPEAC (2017)
Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis
Can a reconfigurable architecture beat ASIC as a CNN accelerator? SAMOS (2017)
Muhammad Adeel Tajammul, Syed M. A. H. Jafri, Ahmed Hemani, Peeter Ellervee
TransMem: A memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs. PATMOS (2016)
Syed M. A. H. Jafri, Masoud Daneshtalab, Naeem Abbas, Guillermo Serrano Leon, Ahmed Hemani
TransMap: Transformation Based Remapping and Parallelism for High Utilization and Energy Efficiency in CGRAs. IEEE Trans. Computers 65 (11) (2016)
Muhammad Adeel Tajammul, Syed M. A. H. Jafri, Peeter Ellervee, Ahmed Hemani, Hannu Tenhunen, Juha Plosila
DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs. VLSI Design (2015)
Syed M. A. H. Jafri, Masoud Daneshtalab, Ahmed Hemani, Naeem Abbas, Muhammad Ali Awan, Juha Plosila
TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs. Microprocess. Microsystems 39 (8) (2015)
Syed M. A. H. Jafri, Ozan Ozbag, Nasim Farahini, Kolin Paul, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
Architecture and Implementation of Dynamic Parallelism, Voltage and Frequency Scaling (PVFS) on CGRAs. ACM J. Emerg. Technol. Comput. Syst. 11 (4) (2015)
Tuan Ngyen, Syed M. A. H. Jafri, Masoud Daneshtalab, Ahmed Hemani, Sergei Dytckov, Juha Plosila, Hannu Tenhunen
FIST: A Framework to Interleave Spiking Neural Networks on CGRAs. PDP (2015)
Syed M. A. H. Jafri, Stanislaw J. Piestrak, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Private reliability environments for efficient fault-tolerance in CGRAs. Des. Autom. Embed. Syst. 18 (3-4) (2014)
Nasim Farahini, Ahmed Hemani, Hasan Sohofi, Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Kolin Paul
Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric. Microprocess. Microsystems 38 (8) (2014)
Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Peeter Ellervee, Juha Plosila, Hannu Tenhunen
Customizable Compression Architecture for Efficient Configuration in CGRAs. FCCM (2014)
Syed M. A. H. Jafri, Stanislaw J. Piestrak, Olivier Sentieys, Sébastien Pillement
Design of the coarse-grained reconfigurable architecture DART with on-line error detection. Microprocess. Microsystems 38 (2) (2014)
Syed M. A. H. Jafri, Guilermo Serrano, Masoud Daneshtalab, Naeem Abbas, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
TransPar: Transformation based dynamic Parallelism for low power CGRAs. FPL (2014)
Hassan Anwar, Syed M. A. H. Jafri, Sergei Dytckov, Masoud Daneshtalab, Masoumeh Ebrahimi, Ahmed Hemani, Juha Plosila, Giovanni Beltrame, Hannu Tenhunen
Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures. MES (2014)
Syed M. A. H. Jafri, Tuan Nguyen Gia, Sergei Dytckov, Masoud Daneshtalab, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
NeuroCGRA: A CGRA with support for neural networks. HPCS (2014)
Syed M. A. H. Jafri, Guilermo Serrano, Junaid Iqbal, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
RuRot: Run-time rotatable-expandable partitions for efficient mapping in CGRAs. ICSAMOS (2014)
Syed M. A. H. Jafri, Ozan Bag, Ahmed Hemani, Nasim Farahini, Kolin Paul, Juha Plosila, Hannu Tenhunen
Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells. ISQED (2013)
Syed M. A. H. Jafri, Liang Guang, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes. Microprocess. Microsystems 37 (8-A) (2013)
Muhammad Adeel Tajammul, Syed M. A. H. Jafri, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
Private configuration environments (PCE) for efficient reconfiguration, in CGRAs. ASAP (2013)
Syed M. A. H. Jafri, Stanislaw J. Piestrak, Kolin Paul, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
Energy-Aware Fault-Tolerant CGRAs Addressing Application with Different Reliability Needs. DSD (2013)
Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs. ICSAMOS (2013)
Syed M. A. H. Jafri, Stanislaw J. Piestrak, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Implementation and evaluation of configuration scrubbing on CGRAs: A case study. ISSoC (2013)
Liang Guang, Syed M. A. H. Jafri, Bo Yang, Juha Plosila, Hannu Tenhunen
Hierarchical Supporting Structure for Dynamic Organization in Many-core Computing Systems. PECCS (2013)
Syed M. A. H. Jafri, Liang Guang, Axel Jantsch, Kolin Paul, Ahmed Hemani, Hannu Tenhunen
Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation. PECCS (2012)
Syed M. A. H. Jafri, Liang Guang, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Energy-Aware Fault-Tolerant Network-on-Chips for Addressing Multiple Traffic Classes. DSD (2012)
Syed M. A. H. Jafri, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures. FPT (2011)
Syed M. A. H. Jafri, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures. IPDPS Workshops (2011)
Syed M. A. H. Jafri, Stanislaw J. Piestrak, Olivier Sentieys, Sébastien Pillement
Design of a fault-tolerant coarse-grained. ISQED (2010)