Subodh Kumar Singhal

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 7

Top Topics

Vlsi Architecture

Top Venues

J. Circuits Syst. Comput.

IET Circuits Devices Syst.

Microprocess. Microsystems

Turkish J. Electr. Eng. Comput. Sci.

Publications

Anuradha, Sujit Kumar Patel, Subodh Kumar Singhal
An area-delay efficient single-precision floating-point multiplier for VLSI systems. Microprocess. Microsystems 98 (2023)
Subodh Kumar Singhal, Sujit Kumar Patel, Anurag Mahajan, Gaurav Saxena
Area-delay efficient Radix-4 8×8 Booth multiplier for DSP applications. Turkish J. Electr. Eng. Comput. Sci. 29 (4) (2021)
Subodh Kumar Singhal, Basant K. Mohanty, Sujit Kumar Patel, Gaurav Saxena
Efficient Diminished-1 Modulo (2n+1) Adder Using Parallel Prefix Adder. J. Circuits Syst. Comput. 29 (12) (2020)
Sujit Kumar Patel, Subodh Kumar Singhal
Area-delay and energy efficient multi-operand binary tree adder. IET Circuits Devices Syst. 14 (5) (2020)
Basant Kumar Mohanty, Subodh Kumar Singhal
Area-Delay and Energy-Efficient Throughput-Scalable VLSI Architecture for SDR Channelizer. Circuits Syst. Signal Process. 35 (8) (2016)
Subodh Kumar Singhal, Basant Kumar Mohanty
Efficient Parallel Architecture for Fixed-Coefficient and Variable-Coefficient FIR Filters Using Distributed Arithmetic. J. Circuits Syst. Comput. 25 (7) (2016)
Basant Kumar Mohanty, Pramod Kumar Meher, Subodh Kumar Singhal, M. N. S. Swamy
A high-performance VLSI architecture for reconfigurable FIR using distributed arithmetic. Integr. 54 (2016)
Basant K. Mohanty, Pramod Kumar Meher, Subodh Kumar Singhal
Efficient architectures for VLSI implementation of 2-D discrete Hadamard transform. ISCAS (2012)
Deepak Sharma, Subodh Kumar Singhal, Ram Mehar Singh Dhariwal
Design of 1.5 GHz Quasilumped Microstrip Highpass Filter. CICSyN (2009)
Subodh Kumar Singhal, Deepak Sharma, Ram Mehar Singh Dhariwal
Design of 1.3 GHz Microstrip Highpass Filter Using Optimum Distributed Short Circuited Stubs. CICSyN (2009)