Anurag Mahajan

Publication Activity (10 Years)

Years Active: 2010-2024
Publications (10 Years): 8

Top Topics

Image Denoising

Cancer Detection

Gaussian Filter

Undecimated Wavelet Transform

Top Venues

Int. J. Manuf. Res.

Traitement du Signal

Turkish J. Electr. Eng. Comput. Sci.

J. Ambient Intell. Humaniz. Comput.

Publications

Durgesh Nandan, Jitendra Kanungo, Anurag Mahajan
An error-efficient Gaussian filter for image processing by using the expanded operand decomposition logarithm multiplication. J. Ambient Intell. Humaniz. Comput. 15 (1) (2024)
Shripad Bhatlawande, Swati Shilaskar, Mahesh Kinge, Anurag Mahajan
Expert System for Real Time Arm Movement Recognition Based on Surface EMG Signal. ICCIDS (2023)
Kiran Malhari Napte, Anurag Mahajan, Shabana Urooj
Automatic Liver Cancer Detection Using Deep Convolution Neural Network. IEEE Access 11 (2023)
Subodh Kumar Singhal, Sujit Kumar Patel, Anurag Mahajan, Gaurav Saxena
Area-delay efficient Radix-4 8×8 Booth multiplier for DSP applications. Turkish J. Electr. Eng. Comput. Sci. 29 (4) (2021)
Shruti Bhargava Choubey, Abhishek Choubey, Durgesh Nandan, Anurag Mahajan
Polycystic Ovarian Syndrome Detection by Using Two-Stage Image Denoising. Traitement du Signal 38 (4) (2021)
Sujit Kumar Patel, Bharat Garg, Anurag Mahajan, Shireesh Kumar Rai
Area-Delay Efficient and Low-Power Carry Skip Adder for High Performance Computing Systems. iSES (2019)
Anurag Mahajan, Sagil James
Analytical modelling and experimental study of machining of smart materials using submerged abrasive waterjet micromachining process. Int. J. Manuf. Res. 14 (3) (2019)
Durgesh Nandan, Jitendra Kanungo, Anurag Mahajan
An efficient VLSI architecture design for logarithmic multiplication by using the improved operand decomposition. Integr. 58 (2017)
Basant K. Mohanty, Anurag Mahajan
Scheduling-scheme and parallel structure for multi-level lifting two-dimensional discrete wavelet transform without using frame-buffer. IET Circuits Devices Syst. 7 (6) (2013)
Basant K. Mohanty, Anurag Mahajan
Efficient-Block-Processing Parallel Architecture for Multilevel Lifting 2-D DWT. J. Low Power Electron. 9 (1) (2013)
Basant K. Mohanty, Anurag Mahajan, Pramod Kumar Meher
Area- and Power-Efficient Architecture for High-Throughput Implementation of Lifting 2-D DWT. IEEE Trans. Circuits Syst. II Express Briefs (7) (2012)
Sandeep Saini, Anurag Mahajan, Srinivas B. Mandalika
Implementation of low power FFT structure using a method based on conditionally coded blocks. APCCAS (2010)
Anurag Mahajan, Basant K. Mohanty
Efficient VLSI architecture for implementation of 1-D discrete wavelet transform based on distributed arithmetic. APCCAS (2010)