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A high-performance VLSI architecture for reconfigurable FIR using distributed arithmetic.
Basant Kumar Mohanty
Pramod Kumar Meher
Subodh Kumar Singhal
M. N. S. Swamy
Published in:
Integr. (2016)
Keyphrases
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vlsi architecture
vlsi implementation
low power
low cost
low complexity
real time
neural network
high speed
filter design
fir filters
peer to peer
frequency domain
hardware implementation