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Soumya Pandit
Publication Activity (10 Years)
Years Active: 2006-2022
Publications (10 Years): 4
Top Topics
Hardware Design
Logic Circuits
Impulsive Noise
Extensive Simulations
Top Venues
VDAT
VLSI Design
ACM J. Emerg. Technol. Comput. Syst.
iSES
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Publications
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Subrata Das
,
Debesh Kumar Das
,
Soumya Pandit
Reliability Aware Global Routing of Graphene Nanoribbon Based Interconnect.
VDAT
(2022)
Subrata Das
,
Petr Fiser
,
Soumya Pandit
,
Debesh Kumar Das
Minimization of Switching Activity of Graphene Based Circuits.
VLSI Design
(2021)
Subrata Das
,
Debesh Kumar Das
,
Soumya Pandit
A Global Routing Method for Graphene Nanoribbons Based Circuits and Interconnects.
ACM J. Emerg. Technol. Comput. Syst.
16 (3) (2020)
Samik Basu
,
Soumya Pandit
,
Amlan Chakrabarti
,
Soma Barman Mandal
FPGA Based Hardware Design for Noise Suppression and Seismic Event Detection.
iSES
(2019)
Debayan Bairagi
,
Soumya Pandit
Study of reverse substrate bias effect of 22nm node epitaxial delta doped channel MOS transistor for low power SoC applications.
VDAT
(2014)
Somnath Paul
,
Abhijit Dana
,
Soumya Pandit
Methodology for Ultra-Low-Power Nano-Scale CMOS OTA Design.
VDAT
(2013)
Joyjit Mukhopadhyay
,
Soumya Pandit
Modeling and Design of a Nano Scale CMOS Inverter for Symmetric Switching Characteristics.
VLSI Design
2012 (2012)
Sipra Mandal
,
Soumya Pandit
Statistical Simulation and Modeling of Nano-scale CMOS VCO Using Artificial Neural Network.
VLSI Design
(2011)
Soumya Pandit
,
Chittaranjan A. Mandal
,
Amit Patra
A Methodology for Generation of Performance Models for the Sizing of Analog High-Level Topologies.
VLSI Design
2011 (2011)
Soumya Pandit
,
Chittaranjan A. Mandal
,
Amit Patra
An automated high-level topology generation procedure for continuous-time SigmaDelta modulator.
Integr.
43 (3) (2010)
Soumya Pandit
,
Chittaranjan A. Mandal
,
Amit Patra
Systematic Methodology for High-Level Performance Modeling of Analog Systems.
VLSI Design
(2009)
Soumya Pandit
,
Sumit K. Bhattacharya
,
Chittaranjan A. Mandal
,
Amit Patra
A Fast Exploration Procedure for Analog High-Level Specification Translation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
27 (8) (2008)
Soumya Pandit
,
Chittaranjan A. Mandal
,
Amit Patra
A formal approach for high level synthesis of linear analog systems.
ACM Great Lakes Symposium on VLSI
(2006)
Soumya Pandit
,
Sougata Kar
,
Chittaranjan A. Mandal
,
Amit Patra
High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count.
DATE
(2006)