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A Methodology for Generation of Performance Models for the Sizing of Analog High-Level Topologies.
Soumya Pandit
Chittaranjan A. Mandal
Amit Patra
Published in:
VLSI Design (2011)
Keyphrases
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high level
low level
mathematical models
experimental data
statistical methods
bayesian framework
design methodology
genetic algorithm
artificial intelligence
decision trees
case study
multiscale
prior knowledge
probabilistic model
statistical models
network topologies