Shogo Nakaya

Publication Activity (10 Years)

Years Active: 1996-2013
Publications (10 Years): 0

Top Venues

SIGARCH Comput. Archit. News

IPSJ Trans. Syst. LSI Des. Methodol.

Publications

Shogo Nakaya, Yuichi Nakamura
Adaptive sensing of ECG signals using R-R interval prediction. EMBC (2013)
Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi
A Non-volatile Reconfigurable Offloader for Wireless Sensor Nodes. IPSJ Trans. Syst. LSI Des. Methodol. 6 (2013)
Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi
A Non-volatile Reconfigurable Offloader for Wireless Sensor Nodes. Inf. Media Technol. 8 (2) (2013)
Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi
A non-volatile reconfigurable offloader for wireless sensor nodes. SIGARCH Comput. Archit. News 40 (5) (2012)
Makoto Miyamura, Shogo Nakaya, Munehiro Tada, Toshitsugu Sakamoto, Koichiro Okamoto, Naoki Banno, Shinji Ishida, Kimihiko Ito, Hiromitsu Hada, Noboru Sakimura, Tadahiko Sugibayashi, Masato Motomura
Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS. ISSCC (2011)
Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara
Arithmetic Operation Oriented Reconfigurable Chip: RHW. FPL (2001)
Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara
Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW. FCCM (2000)
Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Tetsuya Higuchi
Evolvable Hardware Chip for High Precision Printer Image Compression. AAAI/IAAI (1998)
Isamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi
A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. ICES (1998)
Tsukasa Yamauchi, Shogo Nakaya, Nobuki Kajihara
SOP: a reconfigurable massively parallel system and its control-data-flow based compiling method. FCCM (1996)
Tsukasa Yamauchi, Shogo Nakaya, Nobuki Kajihara
SOP: An Adaptive Massively Parallel Computer and its Control-Data-Flow Based Compiling Method. Parcella (1996)