A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI.
Isamu KajitaniTsutomu HoshinoDaisuke NishikawaHiroshi YokoiShogo NakayaTsukasa YamauchiTakeshi InuoNobuki KajiharaMasaya IwataDidier KeymeulenTetsuya HiguchiPublished in: ICES (1998)
Keyphrases
- evolvable hardware
- reconfigurable hardware
- evolutionary computation
- evolutionary algorithm
- low cost
- bio inspired
- hardware software
- digital circuits
- genetic algorithm
- genetic algorithm ga
- functional units
- hardware implementation
- genetic programming
- fitness function
- fault tolerant
- processing elements
- computational intelligence
- image processing
- real time
- fine grain
- simulated annealing
- adaptive systems
- field programmable gate array
- embedded systems
- parallel processing
- particle swarm optimization pso