Santiago Remersaro

Publication Activity (10 Years)

Years Active: 2004-2009
Publications (10 Years): 0

Publications

Santiago Remersaro, Janusz Rajski, Sudhakar M. Reddy, Irith Pomeranz
A scalable method for the generation of small test sets. DATE (2009)
Santiago Remersaro, Janusz Rajski, Thomas Rinderknecht, Sudhakar M. Reddy, Irith Pomeranz
ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction. DFT (2008)
Santiago Remersaro, Xijiang Lin, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski
Low Shift and Capture Power Scan Tests. VLSI Design (2007)
Santiago Remersaro, Xijiang Lin, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski
Scan-Based Tests with Low Switching Activity. IEEE Des. Test Comput. 24 (3) (2007)
Santiago Remersaro, Xijiang Lin, Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski
Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs. ITC (2006)
Miguel Griot, Gabriel Tucci, Pablo Belzarena, Santiago Remersaro
Analysis and improvements to MATE algorithm. IPCCC (2004)