Rong Lin

Publication Activity (10 Years)

Years Active: 1990-2024
Publications (10 Years): 6

Top Topics

Potential Field

Meteorological Data

Top Venues

Publications

Zenghong Wu, Kun Zhang, Weijun Wang, Mengke Fan, Rong Lin
The differences in gastric cancer epidemiological data between SEER and GBD: a joinpoint and age-period-cohort analysis. J. Big Data 11 (1) (2024)
Rong Lin, Zhekai Luo, Jiansen He, Lun Xie, Chuanpeng Hou, Shuwei Chen
Prediction of solar wind speed by applying convolutional neural network to potential field source surface (PFSS) magnetograms. CoRR (2023)
Rong Lin
Research on the precise employment model of college students from the perspective of competency. CIS (2022)
Rong Lin, Chun-Yang Zhang
Contrastive Learning Framework by Maximizing Mutual Information for Visual Question Answering. SPAC (2021)
Rong Lin, Zhiyong Wei, Yunfei Chen
Effects of Commensurability on the Friction and Energy Dissipation in Graphene/Graphene Interface. NEMS (2020)
Ping Hu, Shi Peng, Chengmin Wang, Huicong Fan, Rong Lin, Yong Liu
Application research of the power line carrier communication multiband based on G3 technology. ICSAI (2016)
Kendra M. L. Cooper, João W. Cangussu, Rong Lin, Ganesan Sankaranarayanan, Ragouramane Soundararadjane, W. Eric Wong
An Empirical Study on the Specification and Selection of Components Using Fuzzy Logic. CBSE (2005)
Rong Lin
A Reconfigurable Low-Power High-Performance Matrix Multiplier Architecture with Borrow Parallel Counters. IPDPS (2003)
Rong Lin, Koji Nakano, Stephan Olariu, Albert Y. Zomaya
An Efficient Parallel Prefix Sums Architecture with Domino Logic. IEEE Trans. Parallel Distributed Syst. 14 (9) (2003)
Rong Lin
Bit-Matrix Decomposition and Dynamic Reconfiguration: A Unified Arithmetic Processor Architecture, Design and Test. IPDPS (2002)
Rong Lin, Stephan Olariu
Fast Inner Product Computation on Short Buses. VLSI Design 2002 (4) (2002)
Rong Lin, Martin Margala
Novel design and verification of a 16 x 16-b self-repairable reconfigurable inner product processor. ACM Great Lakes Symposium on VLSI (2002)
Rong Lin
A run-time reconfigurable array of multipliers architecture. IPDPS (2001)
Rong Lin
Inner Product Processor Designs Using High-Performance, Non-Binary Logic Circuits. PDCS (2001)
Rong Lin
A Regularly Structured Parallel Multiplier with Low-power Non-binary-logic Counter Circuits. VLSI Design 2001 (3) (2001)
Rong Lin
Reconfigurable parallel inner product processor architectures. IEEE Trans. Very Large Scale Integr. Syst. 9 (2) (2001)
Rong Lin
Trading Bitwidth For Array Size: A Unified Reconfigurable Arithmetic Processor Design. ISQED (2001)
Rong Lin, Koji Nakano, Stephan Olariu, Maria Cristina Pinotti, James L. Schwing, Albert Y. Zomaya
Scalable Hardware-Algorithms for Binary Prefix Sums. IEEE Trans. Parallel Distributed Syst. 11 (8) (2000)
Rong Lin
Parallel Multiplier Designs Utilizing A Non-Binary Logic Scheme. EUROMICRO (2000)
Rong Lin, James L. Schwing
A Non-binary Parallel Arithmetic Architecture. IPDPS Workshops (2000)
Rong Lin
A Reconfigurable Low-Power High-Performance Matrix Multiplier Design. ISQED (2000)
Rong Lin, Stephan Olariu, James L. Schwing, Biing-Feng Wang
The Mesh with Hybrid Buses: An Efficient Parallel Architecture for Digital Geometry. IEEE Trans. Parallel Distributed Syst. 10 (3) (1999)
Rong Lin, Koji Nakano, Stephan Olariu, Albert Y. Zomaya
An Efficient VLSI Architecture Parallel Prefix Counting With Domino Logic. IPPS/SPDP (1999)
Rong Lin, Koji Nakano, Stephan Olariu, Maria Cristina Pinotti, James L. Schwing, Albert Y. Zomaya
Scalable Hardware-Algorithms for Binary Prefix Sums. IPPS/SPDP Workshops (1999)
Rong Lin, Kevin E. Kerr, André S. Botha
A Novel Approach for CMOS Parallel Counter Design. EUROMICRO (1999)
Rong Lin, Stephan Olariu
Reconfigurable Shift Switching Parallel Comparators. VLSI Design 1999 (1) (1999)
Rong Lin, Stephan Olariu
Efficient VLSI architectures for Columnsort. IEEE Trans. Very Large Scale Integr. Syst. 7 (1) (1999)
Stephan Olariu, Rong Lin
Guest Editorial. VLSI Design 1999 (1) (1999)
Rong Lin, Koji Nakano, Stephan Olariu, Maria Cristina Pinotti, James L. Schwing, Albert Y. Zomaya
A Scalable VLSI Architecture for Binary Prefix Sums. IPPS/SPDP (1998)
Rong Lin, Stephan Olariu
A Fast Parallel Algorithm to Recognize P4-sparse Graphs. Discret. Appl. Math. 81 (1-3) (1998)
Rong Lin
Fast multiplier schemes using large parallel counters and shift switches. HiPC (1997)
Rong Lin
Reconfigurable buses with shift switches for fast final additions of parallel multipliers. PDPTA (1997)
Rong Lin, Stephan Olariu
A simple array processor for binary prefix sums. ASAP (1995)
Rong Lin, Stephan Olariu
A Cost-optimal Erew Breadth-first Algorithm for Ordered Trees, with Applications. Parallel Algorithms Appl. 5 (3-4) (1995)
Rong Lin, Stephan Olariu
Reconfigurable Buses with Shift Switching: Concepts and Applications. IEEE Trans. Parallel Distributed Syst. 6 (1) (1995)
Rong Lin
Convolution Computation on Shift Switching Buses. HICSS (2) (1994)
Dharmavani Bhagavathi, Venkatavasu Bokka, Himabindu Gurla, Rong Lin, Stephan Olariu, James L. Schwing, W. Shen, Larry Wilson
Time-Optimal Multiple Rank Computations on Meshes with Multiple Broadcasting. ICPP (3) (1994)
Rong Lin, Stephan Olariu
An Optimal Parallel Matching Algorithm for Cographs. J. Parallel Distributed Comput. 22 (1) (1994)
Rong Lin, Stephan Olariu, James L. Schwing
An efficient VLSI architecture for digital geometry. ASAP (1994)
Rong Lin, Stephan Olariu, James L. Schwing, Jingyuan Zhang
Computing on Reconfigurable Buses - A New Computational Paradigm. Parallel Process. Lett. 4 (1994)
Rong Lin, Stephan Olariu, James L. Schwing, Jingyuan Zhang
An Efficient Erew Algorithm for Minimum Path Cover and Hamiltonicity on Cographs. Parallel Algorithms Appl. 2 (1-2) (1994)
Rong Lin, Stephan Olariu
Application-specific array processors for binary prefix sum computation. SPDP (1994)
Rong Lin, Stephan Olariu, James L. Schwing, Jingyuan Zhang
Simulating Enhanced Meshes, with Applications. Parallel Process. Lett. 3 (1993)
Dharmavani Bhagavathi, Himabindu Gurla, Stephan Olariu, Rong Lin, James L. Schwing, Jingyuan Zhang
Square Meshes Are Not Optimal For Convex Hull Computation. ICPP (3) (1993)
Rong Lin, Stephan Olariu
A practical constant time sorting network. ASAP (1993)
Rong Lin, Stephan Olariu
A fast cost-optimal parallel algorithm for the lowest common ancestor problem. Parallel Comput. 18 (5) (1992)
Rong Lin
Reconfigurable Buses with Shift Switching - VLSI RADIX Sort. ICPP (3) (1992)
Rong Lin, Stephan Olariu
Computing the Inner Product on Reconfigurable Buses with Shift Switching. CONPAR (1992)
Rong Lin, Stephan Olariu
An optimal parallel matching algorithm for cographs. SPDP (1991)
Rong Lin, Stephan Olariu
An NC Recognition Algorithm for Cographs. J. Parallel Distributed Comput. 13 (1) (1991)
Rong Lin, Stephan Olariu
A Simple Optimal Parallel Algorithm to Solve the Lowest Common Ancestor Problem. ICCI (1991)
Rong Lin, Stephan Olariu
A Fast Parallel Algorithm to Compute Path Functions for Cographs. ICPP (3) (1991)
Rong Lin, Stephan Olariu
Optimal parallel coloring algorithms for a family of tree-representable graphs. ACM Conference on Computer Science (1991)
Rong Lin
Fast Algorithms for Lowest Common Ancestors on a Processor Array with Reconfigurable Buses. Inf. Process. Lett. 40 (4) (1991)
Rong Lin, Stephan Olariu
On the parallel recognition of some tree-representable graphs. SPDP (1990)
Rong Lin, Stephan Olariu
-reducible graphs. Jerusalem Conference on Information Technology (1990)
Rong Lin, Stephan Olariu
Fast Parallel Algorithms for Cographs. FSTTCS (1990)
Rong Lin, Stephan Olariu
A Fast Parallel, Algorithm to Recognize, Partitionable Graphs. Inf. Process. Lett. 36 (3) (1990)