Richard Ruzicka

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 17

Top Topics

Digital Circuits

Kullback Leibler

Functional Units

Rewriting Rules

Top Venues

Publications

Richard Ruzicka, Václav Simek, Jan Nevoral
Polymorphic RTL Computational Elements. DSD (2023)
Richard Ruzicka, Václav Simek
Technology Mapping for PAIG Optimised Polymorphic Circuits. DSD (2022)
Jan Nevoral, Václav Simek, Richard Ruzicka
Power Consumption Analysis of New Generation of Polymorphic Gates. DDECS (2020)
Adam Crha, Václav Simek, Richard Ruzicka
KL-cuts influence on optimization of polymorphic circuits based on PAIG rewriting. DDECS (2020)
Jan Nevoral, Václav Simek, Richard Ruzicka
PoLibSi: Path Towards Intrinsically Reconfigurable Components. DSD (2019)
Adam Crha, Václav Simek, Richard Ruzicka
PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. DSD (2019)
Jan Nevoral, Richard Ruzicka
Efficient Implementation of Bi-Functional RTL Components - Case Study. NGCAS (2018)
Adam Crha, Václav Simek, Richard Ruzicka
Towards novel format for representation of polymorphic circuits. DTIS (2018)
Jan Nevoral, Richard Ruzicka, Václav Simek
CMOS Gates with Second Function. ISVLSI (2018)
Jan Nevoral, Richard Ruzicka, Václav Simek
From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. DSD (2018)
Jan Nevoral, Václav Simek, Richard Ruzicka
Compact library of efficient polymorphic gates based on ambipolar transistors. DTIS (2017)
Adam Crha, Richard Ruzicka, Václav Simek
Synthesis tool for design of complex polymorphic circuits. DTIS (2017)
Václav Simek, Radek Tesar, Richard Ruzicka, Adam Crha
Modelling and physical implementation of ambipolar components based on organic materials. ICM (2016)
Richard Ruzicka, Radek Tesar
Lets move polymorphism downwards: On the multifunctional logic based on ambipolar behaviour of semiconductor devices. DTIS (2016)
Jan Nevoral, Richard Ruzicka, Vojtech Mrazek
Evolutionary design of polymorphic gates using ambipolar transistors. SSCI (2016)
Adam Crha, Richard Ruzicka, Václav Simek
Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates. UKSim (2015)
Václav Simek, Richard Ruzicka, Adam Crha
Toward efficient synthesis method of multifunctional logic circuits. ICM (2015)
Radek Tesar, Richard Ruzicka, Václav Simek
Resistant Gates for Polymorphic Electronics. EMS (2014)
Václav Simek, Richard Ruzicka, Adam Crha, Radek Tesar
Implementation of a Cellular Automaton with Globally Switchable Rules. ACRI (2014)
Václav Simek, Richard Ruzicka
Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature. EMS (2014)
Lukás Sekanina, Richard Ruzicka, Zdenek Vasícek, Václav Simek, Petr Hanácek
Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit. Inf. Technol. Control. 42 (1) (2013)
Richard Ruzicka, Václav Simek
NAND/NOR gate polymorphism in low temperature environment. DDECS (2012)
Richard Ruzicka, Václav Simek
Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. DSD (2011)
Richard Ruzicka, Václav Simek, Lukás Sekanina
Behavior of CMOS polymorphic circuits in high temperature environment. DDECS (2011)
Richard Ruzicka
Gracefully Degrading Circuit Controllers Based on Polytronics. DSD (2010)
Václav Simek, Richard Ruzicka, Lukás Sekanina
On analysis of fabricated polymorphic circuits. DDECS (2010)
Lukás Sekanina, Richard Ruzicka, Zdenek Vasícek, Roman Prokop, Lukás Fujcik
REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware. WEAH (2009)
Richard Ruzicka
Dependable Controller Design Using Polymorphic Counters. DSD (2009)
Lukás Sekanina, Richard Ruzicka, Zbysek Gajda
Polymorphic FIR Filters with Backup Mode Enabling Power Savings. AHS (2009)
Richard Ruzicka, Lukás Sekanina, Roman Prokop
Physical Demonstration of Polymorphic Self-Checking Circuits. IOLTS (2008)
Richard Ruzicka, Josef Strnadel
Test Controller Synthesis Constrained by Circuit Testability Analysis. DSD (2007)
Richard Ruzicka, Lukás Sekanina
Evolutionary circuit design in REPOMO - reconfigurable polymorphic module. Computational Intelligence (2006)
Richard Ruzicka, Pavel Tupec
Formal Approach to Synthesis of a Test Controller. ECBS (2004)
Lukás Sekanina, Richard Ruzicka
Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. Evolvable Hardware (2003)
Richard Ruzicka
Testable Design Verification Using Petri Nets. DSD (2003)
Zdenek Kotásek, Richard Ruzicka, Jan Hlavicka
Formal Approach to the RTL Testability Analysis. LATW (2000)