Reiner Kolla

Publication Activity (10 Years)

Years Active: 1983-2017
Publications (10 Years): 6

Top Venues

NOCS

ARCS

HealthCom

J. Syst. Archit.

Saarland University, Saarbrücken, Germany (PHD)

Education History

Saarland University, Saarbrücken, Germany

PHD

Publications

Isabel Madeleine Runge, Reiner Kolla
MCGC: A Network Coding Approach for Reliable Large-scale Wireless Networks. FAILSAFE@SenSys (2017)
Armin Runge, Reiner Kolla
TwoPhases: A transmission scheme to reduce the link width at deflection routing based Network-on-Chips. J. Syst. Archit. 75 (2017)
Aulia Arif Iskandar, Reiner Kolla, Klaus Schilling, Wolfram Völker
A wearable 1-lead necklace ECG for continuous heart rate monitoring. HealthCom (2016)
Armin Runge, Reiner Kolla
An Alternating Transmission Scheme for Deflection Routing Based Network-on-Chips. ARCS (2016)
Armin Runge, Reiner Kolla
Consideration of the Flit Size for Deflection Routing based Network-on-Chips. AISTECS@HiPEAC (2016)
Armin Runge, Reiner Kolla
Using benes networks at fault-tolerant and deflection routing based network-on-chips. NOCS (2016)
Armin Runge, Marcel Baunach, Reiner Kolla
Precise self-calibration of ultrasound based indoor localization systems. IPIN (2011)
Marcel Baunach, Reiner Kolla, Clemens Muhlberger
Beyond Theory: Development of a Real World Localization Application as Low Power WSN. LCN (2007)
Marcel Baunach, Reiner Kolla, Clemens Muhlberger
A Method for Self-Organizing Communication in WSN Based Localization Systems: HashSlot. LCN (2007)
Frank Wolz, Reiner Kolla
Disproving the Perfect-Rate Property of Data-Flow Graphs Unfolded by the Least Common Multiple of the Number of Loop Registers. IEEE Trans. Computers 52 (5) (2003)
Frank Wolz, Reiner Kolla
A Retargetable Macro Generation Method for the Evaluation of Repetitive Configurable Architectures. FPL (2002)
Frank Wolz, Reiner Kolla
Bubble Partitioning for LUT-Based Sequential Circuits. FPL (2001)
Frank Wolz, Reiner Kolla
A New Floorplanning Method for FPGA Architectural Research. FPL (2000)
Reiner Kolla
Technology Binding. Inform. Spektrum 23 (3) (2000)
Winfried Nöth, Reiner Kolla
Spanning Tree-based State Encoding for Low Power Dissipation. DATE (1999)
Reiner Kolla, A. Vodopivec, Jürgen Wolff von Gudenberg
Splitting Double Precision FPUs for Single Precision Interval Arithmetic. ARCS Workshops (1999)
Reiner Kolla, Oliver Springauf
PACE: Processor Architectures for Circuit Emulation. IPPS/SPDP Workshops (1998)
Uwe Hinsberger, Reiner Kolla
Boolean Matching for Large Libraries. DAC (1998)
Uwe Hinsberger, Reiner Kolla, Markus Wild
A parallel hybrid approach to hard optimization problems. ARCS (1997)
Winfried Nöth, Reiner Kolla
Node normalization and decomposition in low power technology mapping. ISLPED (1997)
Winfried Nöth, Uwe Hinsberger, Reiner Kolla
TROY: A Tree-Based Approach to Logic Synthesis and Technology Mapping. Great Lakes Symposium on VLSI (1996)
Uwe Hinsberger, Reiner Kolla
Optimal technology mapping for single output cells. Great Lakes Symposium on VLSI (1995)
Uwe Hinsberger, Reiner Kolla
A cell-based approach to performance optimization of fanout-free circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (10) (1992)
Reiner Kolla, Bernd Serf
The Virtual Feedback Problem in Hierarchical Representations of Combinational Circuits. Acta Informatica 28 (5) (1991)
Uwe Hinsberger, Reiner Kolla
Cell based performance optimization of combinational circuits. EURO-DAC (1990)
Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann
A graphical system for hierarchical specifications and checkups of VLSI circuits. EURO-DAC (1990)
Reiner Kolla
Minimal Area Sizing of Power Supply Nets in VLSI Circuits. J. Inf. Process. Cybern. 26 (11/12) (1990)
Reiner Kolla
A dynamic programming approach to the power supply net sizing problem. EURO-DAC (1990)
Reiner Kolla, Paul Molitor
A note on hierarchical layer-assignment. Integr. 7 (3) (1989)
Bernd Becker, Reiner Kolla
On the Construction of Optimal Time Adders (Extended Abstract). STACS (1988)
Bernd Becker, Günter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof
Hierarchical Design Based on a Calculus of Nets. DAC (1987)
Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor
Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil II. Inform. Forsch. Entwickl. 1 (2) (1986)
Günter Hotz, Reiner Kolla, Paul Molitor
On Network Algebras and Recursive Equations. Graph-Grammars and Their Application to Computer Science (1986)
Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor
Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil I. Inform. Forsch. Entwickl. 1 (1) (1986)
Reiner Kolla
Where-Oblivious is not Sufficient. Inf. Process. Lett. 17 (5) (1983)

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Publication Activity (10 Years)

Top Topics

Top Venues

Reiner Kolla