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A graphical system for hierarchical specifications and checkups of VLSI circuits.

Bernd BeckerThomas BurchGünter HotzD. KielReiner KollaPaul MolitorHans-Georg OsthofGisela PitschUwe Sparmann
Published in: EURO-DAC (1990)
Keyphrases
  • vlsi circuits
  • low power
  • high level
  • mixed signal
  • hidden markov models
  • high speed
  • input output
  • hierarchical structure
  • dynamic scenes
  • formal specification
  • delay insensitive