R. P. Agarwal

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 1

Top Topics

Independent Variables

Multiple Regression

Attitudes Toward

Top Venues

Math. Comput. Simul.

Publications

Divyansh Pandey, Rajesh Kumar Pandey, R. P. Agarwal
Numerical approximation of fractional variational problems with several dependent variables using Jacobi poly-fractonomials. Math. Comput. Simul. 203 (2023)
Ramesh Vaddi, R. P. Agarwal, Sudeb Dasgupta
Analytical modeling of subthreshold current and subthreshold swing of an underlap DGMOSFET with tied-independent gate and symmetric-asymmetric options. Microelectron. J. 42 (5) (2011)
B. K. Sharma, R. P. Agarwal, Raghuraj Singh
An Efficient Software Watermark by Equation Reordering and FDOS. SocProS (2) (2011)
Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal
Effect of Gate-S/D Underlap, Asymmetric and Independent Gate Features in the Minimization of Short Channel Effects in Nanoscale DGMOSFET. ISVLSI (2011)
Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal
Robust and Ultra Low Power Subthreshold Logic Circuits with Symmetric, Asymmetric, 3T, 4T DGFinFETs. J. Low Power Electron. 6 (1) (2010)
Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal
Robustness comparison of DG FinFETs with symmetric, asymmetric, tied and independent gate options with circuit co-design for ultra low power subthreshold logic. Microelectron. J. 41 (4) (2010)
Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal
Comparison of nano-scale complementary metal-oxide semiconductor and 3T-4T double gate fin-shaped field-effect transistors for robust and energy-efficient subthreshold logic. IET Circuits Devices Syst. 4 (6) (2010)
Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal
Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. VLSI Design 2009 (2009)