Praveen K. Murthy

Publication Activity (10 Years)

Years Active: 1994-2014
Publications (10 Years): 0

Top Topics

Big Data Analytics

Health Informatics

Security Concerns

Top Venues

Publications

Praveen K. Murthy
Top ten challenges in Big Data security and privacy. ITC (2014)
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya
Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls. ACM Trans. Embed. Comput. Syst. 6 (2) (2007)
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya
Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition. SCOPES (2004)
Shuvra S. Bhattacharyya, Praveen K. Murthy
The CBP Parameter: A Module Characterization Approach for DSP Software Optimization. J. VLSI Signal Process. 38 (2) (2004)
Praveen K. Murthy, Sreeranga P. Rajan, Koichiro Takayama
High level hardware validation using hierarchical message sequence charts. HLDVT (2004)
Praveen K. Murthy, Shuvra S. Bhattacharyya
Buffer merging - a powerful technique for reducing memory requirements of synchronous dataflow specifications. ACM Trans. Design Autom. Electr. Syst. 9 (2) (2004)
Praveen K. Murthy, Edward A. Lee
Multidimensional synchronous dataflow. IEEE Trans. Signal Process. 50 (8) (2002)
Praveen K. Murthy, Shuvra S. Bhattacharyya
Shared buffer implementations of signal processing systems usinglifetime analysis techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (2) (2001)
Praveen K. Murthy, Etan G. Cohen, Steve Rowland
System canvas: a new design environment for embedded DSP and telecommunication systems. CODES (2001)
Shuvra S. Bhattacharyya, Praveen K. Murthy
The CBP parameter - a useful annotation to aid block-diagram compilers for DSP. ISCAS (2000)
Praveen K. Murthy, Shuvra S. Bhattacharyya
Shared Memory Implementations of Synchronous Dataflow Specifications. DATE (2000)
Praveen K. Murthy, Shuvra S. Bhattacharyya
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications. ISSS (1999)
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
Synthesis of Embedded Software from Synchronous Dataflow Specifications. J. VLSI Signal Process. 21 (2) (1999)
Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli
Scheduling for Embedded Real-Time Systems. IEEE Des. Test Comput. 15 (1) (1998)
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations. Des. Autom. Embed. Syst. 2 (1) (1997)
Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee
Joint Minimization of Code and Data for Synchronous Dataflow Programs. Formal Methods Syst. Des. 11 (1) (1997)
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
Optimized software synthesis for synchronous dataflow. ASAP (1997)
Praveen K. Murthy, Edward A. Lee
An extension of multidimensional synchronous dataflow to handle arbitrary sampling lattices. ICASSP (1996)
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
Converting graphical DSP programs into memory constrained software prototypes. RSP (1995)
Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee
Minimizing memory requirements for chain-structured synchronous dataflow programs. ICASSP (2) (1994)