High level hardware validation using hierarchical message sequence charts.
Praveen K. MurthySreeranga P. RajanKoichiro TakayamaPublished in: HLDVT (2004)
Keyphrases
- high level
- low level
- low cost
- real time
- pitman yor process
- higher level
- hierarchical structure
- hardware implementation
- computer systems
- neural network
- communication channels
- massively parallel
- high level programming
- programming language
- control system
- image processing
- hardware and software
- hierarchical model
- hardware design
- intermediate level
- random number
- model validation
- data sets