Peter J. Camporese

Publication Activity (10 Years)

Years Active: 1997-2007
Publications (10 Years): 0

Publications

Rex Berridge, Robert M. Averill III, Arnold E. Barish, Michael A. Bowen, Peter J. Camporese, Jack DiLullo, Peter E. Dudley, Joachim Keinert, David W. Lewis, Robert D. Morel, Thomas E. Rosser, Nicole S. Schwartz, Philip Shephard, Howard H. Smith, Dave Thomas, Phillip J. Restle, John R. Ripley, Stephen L. Runyon, Patrick M. Williams
IBM POWER6 microprocessor physical design and design methodology. IBM J. Res. Dev. 51 (6) (2007)
Brian W. Curran, Yuen H. Chan, Philip T. Wu, Peter J. Camporese, Gregory A. Northrop, Robert F. Hatch, Lisa B. Lacey, James P. Eckhardt, David T. Hui, Howard H. Smith
IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology. IBM J. Res. Dev. 46 (4-5) (2002)
Phillip J. Restle, Timothy G. McNamara, David A. Webber, Peter J. Camporese, Kwok F. Eng, Keith A. Jenkins, David H. Allen, Michael J. Rohn, Michael P. Quaranta, David W. Boerstler, Charles J. Alpert, Craig A. Carter, Roger N. Bailey, John G. Petrovick, Byron L. Krauter, Bradley D. McCredie
A clock distribution network for microprocessors. IEEE J. Solid State Circuits 36 (5) (2001)
Robert M. Averill III, Keith G. Barkley, Michael A. Bowen, Peter J. Camporese, Allan H. Dansky, Robert F. Hatch, Dale E. Hoffman, Mark D. Mayo, Scott A. McCabe, Timothy G. McNamara, Thomas J. McPherson, Gregory A. Northrop, Leon J. Sigal, Howard H. Smith, David A. Webber, Patrick M. Williams
Chip integration methodology for the IBM S/390 G5 and G6 custom microprocessors. IBM J. Res. Dev. 43 (5) (1999)
Leon J. Sigal, James D. Warnock, Brian W. Curran, Yuen H. Chan, Peter J. Camporese, Mark D. Mayo, William V. Huott, Daniel R. Knebel, Ching-Te Chuang, James P. Eckhardt, Philip T. Wu
Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor. IBM J. Res. Dev. 41 (4&5) (1997)
Charles F. Webb, Carl J. Anderson, Leon J. Sigal, Kenneth L. Shepard, John S. Liptay, James D. Warnock, Brian W. Curran, Barry Krumm, Mark D. Mayo, Peter J. Camporese, Eric M. Schwarz, Mark S. Farrell, Phillip J. Restle, Robert M. Averill III, Timothy J. Slegel, William V. Huott, Yuen H. Chan, Bruce Wile, Thao N. Nguyen, Philip G. Emma, Daniel K. Beece, Ching-Te Chuang, Cyril Price
A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders. IEEE J. Solid State Circuits 32 (11) (1997)