Peter Gregorius

Publication Activity (10 Years)

Years Active: 2004-2014
Publications (10 Years): 0

Top Topics

Blind Equalization

Communication Systems

Low Power Consumption

Top Venues

Publications

Boris Traskov, Ulrich Langenbach, Klaus Hofmann, Peter Gregorius
Hardware architecture of an Internet Protocol Version 6 processor. SoCC (2014)
Yuan Fang, Ling Chen, Ashok Jaiswal, Klaus Hofmann, Peter Gregorius
Adaptive Equalizer Training for High-Speed Low-Power Communication Systems. DSD (2013)
Ulrich Langenbach, A. Berthe, Boris Traskov, S. Weide, Klaus Hofmann, Peter Gregorius
A 10 GbE TCP/IP hardware stack as part of a protocol acceleration platform. ICCE-Berlin (2013)
Ashok Jaiswal, Yuan Fang, Peter Gregorius, Klaus Hofmann
Adaptive Low-Power Synchronization Technique for Multiple Source-Synchronous Clocks in High-Speed Communication Systems. DSD (2013)
Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein
A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques. IEEE J. Solid State Circuits 45 (1) (2010)
Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein
75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques. ISSCC (2009)
Zheng Gu, Peter Gregorius, Daniel Kehrer, Lydia Neumann, Evelyn Neuscheler, Thomas Rickes, Hermann Ruckerbauer, Ralf Schledz, Martin Streibl, Jürgen Zielbauer
Cascading Techniques for a High-Speed Memory Interface. ISSCC (2007)
Nicola Da Dalt, Edwin Thaller, Peter Gregorius, Lajos Gazsi
A compact triple-band low-jitter digital LC PLL with programmable coil in 130-nm CMOS. IEEE J. Solid State Circuits 40 (7) (2005)
Nicola Da Dalt, Edwin Thaller, Peter Gregorius, Lajos Gazsi
A low jitter triple-band digital LC PLL in 130nm CMOS. ESSCIRC (2004)