Nasim Pour Aryan

Publication Activity (10 Years)

Years Active: 2012-2020
Publications (10 Years): 3

Top Topics

Functional Decomposition

Challenging Sequences

High Reliability

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Jahnavi Kasturi Rangan, Nasim Pour Aryan, Jens Bargfrede, Lantao Wang, Christian Funke, Helmut Graeb
Synthesis of DDRO Timing Monitors by Delay-Tracking and Static Timing Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2020)
Jahnavi Kasturi Rangan, Nasim Pour Aryan, Lantao Wang, Jens Bargfrede, Christian Funke, Helmut Graeb
Design-dependent Monitors Based on Delay Sensitivity Tracking. ICECS (2018)
Nasim Pour Aryan, Christian Funke, Jens Bargfrede, Cenk Yilmaz, Doris Schmitt-Landsiedel, Georg Georgakos
In situ measurement of aging-induced performance degradation in digital circuits. ETS (2016)
Nasim Pour Aryan, Nils Heidmann, Martin Wirnshofer, Nico Hellwege, Jonas Pistor, Dagmar Peters-Drolshagen, Georg Georgakos, Steffen Paul, Doris Schmitt-Landsiedel
Power efficient digital IC design for a medical application with high reliability requirements. PATMOS (2014)
Nasim Pour Aryan, A. Listl, Leonhard Heiß, Cenk Yilmaz, Georg Georgakos, Doris Schmitt-Landsiedel
From an analytic NBTI device model to reliability assessment of complex digital circuits. IOLTS (2014)
Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel
Reliability monitoring of digital circuits by in situ timing measurement. PATMOS (2013)
Martin Wirnshofer, Nasim Pour Aryan, Leonhard Heiß, Doris Schmitt-Landsiedel, Georg Georgakos
Delay Monitoring to Adapt for Pvta variations. J. Circuits Syst. Comput. 21 (8) (2012)
Martin Wirnshofer, Leonhard Heiß, Anil Narayan Kakade, Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel
Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit. DDECS (2012)