Michael Roberge

Publication Activity (10 Years)

Years Active: 2007-2019
Publications (10 Years): 2

Top Topics

Digital Signal Processors

Modeling Language

Top Venues

Publications

Eric Hunt-Schroeder, Darren Anand, Edward Hwang, Aaron Cummings, Matthew Deming, Michael Roberge, Michael Ziegerhofer
Behavioral Modeling of a Charge Trap Transistor One Time Programmable Memory. NATW (2019)
Eric Hunt-Schroeder, Darren Anand, John A. Fifield, Mark Jacunski, Michael Roberge, Dale E. Pontius, Kevin Batson, Toshiaki Kirihata
14NM FinFET 1.5MB Embedded High-K Charge Trap Transistor One Time Programmable Memory Using Dynamic Adaptive Programming. VLSI Circuits (2018)
Mark Jacunski, Darren Anand, Robert Busch, John A. Fifield, Matthew Lanahan, Paul Lane, Adrian Paparelli, Gary Pomichter, Dale E. Pontius, Michael Roberge, Stephen Sliva
A 45nm SOI compiled embedded DRAM with random cycle times down to 1.3ns. CICC (2010)
Darren Anand, Jim Covino, Jeffrey H. Dreibelbis, John A. Fifield, Kevin W. Gorman, Mark Jacunski, Jake Paparelli, Gary Pomichter, Dale E. Pontius, Michael Roberge, Stephen Sliva
A 1.0GHz multi-banked embedded DRAM in 65nm CMOS featuring concurrent refresh and hierarchical BIST. CICC (2007)
Kevin W. Gorman, Michael Roberge, Adrian Paparelli, Gary Pomichter, Stephen Sliva, William Corbin
Advancements in at-speed array BIST: multiple improvements. ITC (2007)