Mark Yeck

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 14

Top Topics

Silicon On Insulator

Quantum Computing

Top Venues

IEEE J. Solid State Circuits

Publications

David J. Frank, Sudipto Chakraborty, Kevin Tien, Pat Rosno, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Scott Lekuch, Ken Inoue, Devin Underwood, Dorothy Wisnieff, Chris Baks, John Timmerwilke, Peilin Song, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
Low power cryogenic RF ASICs for quantum computing. CICC (2023)
Rajiv V. Joshi, Jean-Olivier Plouchart, George Zettles, Scott Willenborg, Sudipto Chakraborty, Blake R. Johnson, Andrew Wack, Brian Allison, John Timmerwilke, Kevin Tien, Mark Yeck, Dereje Yilma, Alberto Valdes-Garcia, Daniel J. Friedman
Cryogenic CMOS: design considerations for future quantum computing systems. CICC (2023)
Bodhisatwa Sadhu, Arun Paidimarri, Wooram Lee, Mark Yeck, Caglar Ozdag, Yujiro Tojo, Jean-Olivier Plouchart, Xiaoxiong Gu, Yusuke Uemichi, Sudipto Chakraborty, Yo Yamaguchi, Ning Guan, Alberto Valdes-Garcia
A 24-to-30GHz 256-Element Dual-Polarized 5G Phased Array with Fast Beam-Switching Support for >30, 000 Beams. ISSCC (2022)
David J. Frank, Sudipto Chakraborty, Kevin Tien, Pat Rosno, Thomas Fox, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Shawn D. Chambers, Scott Lekuch, Ken Inoue, Devin Underwood, Dorothy Wisnieff, Christian W. Baks, Donald Bethune, John Timmerwilke, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology. ISSCC (2022)
Bodhisatwa Sadhu, Arun Paidimarri, Duixian Liu, Mark Yeck, Caglar Ozdag, Yujiro Tojo, Wooram Lee, Kevin Xiaoxiong Gu, Jean-Olivier Plouchart, Christian W. Baks, Yusuke Uemichi, Sudipto Chakraborty, Yo Yamaguchi, Ning Guan, Alberto Valdes-Garcia
A 24-30-GHz 256-Element Dual-Polarized 5G Phased Array Using Fast On-Chip Beam Calculators and Magnetoelectric Dipole Antennas. IEEE J. Solid State Circuits 57 (12) (2022)
Rajiv V. Joshi, John Timmerwilke, Kevin Tien, Mark Yeck, Sudipto Chakraborty
A 0.31V Vmin Cryogenic SRAM in 14 nm FinFET for Quantum Computing. VLSI Technology and Circuits (2022)
Sudipto Chakraborty, David J. Frank, Kevin Tien, Pat Rosno, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Devin Underwood, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Shawn D. Chambers, Scott Lekuch, Ken Inoue, Dorothy Wisnieff, Christian W. Baks, Donald S. Bethune, John Timmerwilke, Thomas Fox, Peilin Song, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
A Cryo-CMOS Low-Power Semi-Autonomous Transmon Qubit State Controller in 14-nm FinFET Technology. IEEE J. Solid State Circuits 57 (11) (2022)
Kevin Tien, Ken Inoue, Scott Lekuch, David J. Frank, Sudipto Chakraborty, Pat Rosno, Thomas Fox, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Devin Underwood, Dorothy Wisnieff, Christian W. Baks, Donald Bethune, John Timmerwilke, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation. DATE (2022)
Bodhisatwa Sadhu, Alberto Valdes-Garcia, Jean-Olivier Plouchart, Herschel A. Ainspan, Arpit K. Gupta, Mark A. Ferriss, Mark Yeck, Mihai Sanduleanu, Xiaoxiong Gu, Christian W. Baks, Duixian Liu, Daniel J. Friedman
A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage. IEEE J. Solid State Circuits 55 (6) (2020)
Alberto Valdes-Garcia, Bodhisatwa Sadhu, Xiaoxiong Gu, Jean-Olivier Plouchart, Mark Yeck, Daniel J. Friedman
Scaling Millimeter-Wave Phased Arrays: Challenges and Solutions. BCICTS (2018)
Bodhisatwa Sadhu, Arun Paidimarri, Mark A. Ferriss, Mark Yeck, Xiaoxiong Gu, Alberto Valdes-Garcia
A 128-element Dual-Polarized Software-Defined Phased Array Radio for mm-wave 5G Experimentation. mmNets@MobiCom (2018)
Wooram Lee, Jean-Olivier Plouchart, Caglar Ozdag, Yigit Aydogan, Mark Yeck, Alper Cabuk, Asim Kepkep, Scott K. Reynolds, Emre Apaydin, Alberto Valdes-Garcia
Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C. IEEE J. Solid State Circuits 53 (9) (2018)
Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Daniel J. Friedman, Alberto Valdes-Garcia
7.2 A 28GHz 32-element phased-array transceiver IC with concurrent dual polarized beams and 1.4 degree beam-steering resolution for 5G communication. ISSCC (2017)
Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Mark A. Ferriss, Duixian Liu, Daniel J. Friedman, Alberto Valdes-Garcia
A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications. IEEE J. Solid State Circuits 52 (12) (2017)