Manfred Schimmler

Publication Activity (10 Years)

Years Active: 1983-2017
Publications (10 Years): 3

Top Venues

ICPADS

ICCS

SSCI

ASAP

University of Kiel, Germany (PHD)

Education History

University of Kiel, Germany

PHD

Publications

Vasco Grossmann, Manfred Schimmler
GPGPU-based identification of cointegrated portfolios. SSCI (2017)
Vasco Grossmann, Manfred Schimmler
Portfolio-based contract selection in commodity futures markets. SSCI (2016)
Jan Christian Kässens, Lars Wienbrandt, Manfred Schimmler, Jorge González-Domínguez, Bertil Schmidt
Combining GPU and FPGA technology for efficient exhaustive interaction analysis in GWAS. ASAP (2016)
Jan Christian Kässens, Lars Wienbrandt, Jorge González-Domínguez, Bertil Schmidt, Manfred Schimmler
High-speed exhaustive 3-locus interaction epistasis analysis on FPGAs. J. Comput. Sci. 9 (2015)
Jorge González-Domínguez, Lars Wienbrandt, Jan Christian Kässens, David Ellinghaus, Manfred Schimmler, Bertil Schmidt
Parallelizing Epistasis Detection in GWAS on FPGA and GPU-Accelerated Computing Systems. IEEE ACM Trans. Comput. Biol. Bioinform. 12 (5) (2015)
Ayman Abbas, Rian Voss, Lars Wienbrandt, Manfred Schimmler
An efficient implementation of PBKDF2 with RIPEMD-160 on multiple FPGAs. ICPADS (2014)
Sven Koschnicke, Vasco Grossmann, Christoph Starke, Manfred Schimmler
Quality and consistency assurance of quote data for algorithmic trading strategies. CIFEr (2014)
Lars Wienbrandt, Jan Christian Kässens, Jorge González-Domínguez, Bertil Schmidt, David Ellinghaus, Manfred Schimmler
FPGA-based Acceleration of Detecting Statistical Epistasis in GWAS. ICCS (2014)
Christoph Starke, Vasco Grossmann, Lars Wienbrandt, Manfred Schimmler
An FPGA Implementation of an Investment Strategy Processor. ICCS (2012)
Lars Wienbrandt, Daniel Siebert, Manfred Schimmler
Improvement of BLASTp on the FPGA-Based High-Performance Computer RIVYERA. ISBRA (2012)
Ayman Abbas, Claas Anders Rathje, Lars Wienbrandt, Manfred Schimmler
Dictionary Attack on TrueCrypt with RIVYERA S3-5000. ICPADS (2012)
Christoph Starke, Vasco Grossmann, Lars Wienbrandt, Sven Koschnicke, John Carstens, Manfred Schimmler
Optimizing Investment Strategies with the Reconfigurable Hardware Platform RIVYERA. Int. J. Reconfigurable Comput. 2012 (2012)
Florian Schatz, Sven Koschnicke, Niklas Paulsen, Manfred Schimmler
Master/Slave assignment optimization for high performance computing in an EC2 cloud using MPI. Netw. Protoc. Algorithms 4 (1) (2012)
Florian Schatz, Sven Koschnicke, Niklas Paulsen, Christoph Starke, Manfred Schimmler
MPI Performance Analysis of Amazon EC2 Cloud Services for High Performance Computing. ACC (1) (2011)
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Florian Schatz, Manfred Schimmler
Massively parallel FPGA-based implementation of BLASTp with the two-hit method. ICCS (2011)
Lars Wienbrandt, Manfred Schimmler
Collecting Statistical Information in DNA Sequences for the Detection of Special Motifs. BIOCOMP (2010)
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Carol May Yen Yeo, Manfred Schimmler
Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics. ICCS (1) (2010)
Gerd Pfeiffer, Stefan Baumgart, Jan Schröder, Manfred Schimmler
A Massively Parallel Architecture for Bioinformatics. ICCS (1) (2009)
Jan Schröder, Manfred Schimmler, Heiko Schröder, Karsten Tischer
BMA - Boolean Matrices as Model for Motif Kernels. BCBGC (2008)
Tim Güneysu, Christof Paar, Gerd Pfeiffer, Manfred Schimmler
Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis. FPL (2008)
Jan Schröder, Lars Wienbrandt, Gerd Pfeiffer, Manfred Schimmler
Massively Parallelized DNA Motif Search on the Reconfigurable Hardware Platform COPACOBANA. PRIB (2008)
Gerd Pfeiffer, Manfred Schimmler
A Specification Methodology for the Optimal Layout of a 2-Stage Interconnect Bus for Massively Parallel Architectures. CDES (2008)
Tim Güneysu, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler, Christian Schleiffer
Parallel Computing with Low-Cost FPGAs: A Framework for COPACOBANA. PARCO (2007)
Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker. CHES (2006)
Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
A Configuration Concept for a Massively Parallel FPGA Architecture. CDES (2006)
Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
COPACOBANA A Cost-Optimized Special-Purpose Hardware for Code-Breaking. FCCM (2006)
Stefan Baumgart, Begona Toledo, Karin Spors, Manfred Schimmler
PLUG: An Agent Based Prototype Validation of CAD-Constructions. IKE (2006)
David Narh Amanor, Viktor Bunimov, Christof Paar, Jan Pelzl, Manfred Schimmler
Efficient Hardware Architectures for Modular Multiplication on FPGAs. FPL (2005)
Viktor Bunimov, Manfred Schimmler
Completely Redundant Modular Exponentiation by Operand Changing. CDES (2005)
Gerd Pfeiffer, Heinz Kreft, Manfred Schimmler
Hardware Enhanced Biosequence Alignment. METMBS (2005)
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang
A bit-serial floating-point unit for a massively parallel system on a chip. Parallel Algorithms Appl. 19 (2-3) (2004)
Manfred Schimmler, Viktor Bunimov
Fast Modular Multiplication by Operand Changing. ITCC (2) (2004)
Viktor Bunimov, Manfred Schimmler
High Radix Modular Multiplication of Large Integers Optimised with Respect to Area and Time. ESA/VLSI (2004)
Manfred Schimmler, Viktor Bunimov
A Simple Circuit to Reduce the Search Range for Large Prime Numbers. VLSI (2003)
Viktor Bunimov, Manfred Schimmler
Area and Time Efficient Modular Multiplication of Large Integers. ASAP (2003)
Viktor Bunimov, Manfred Schimmler, Wolfgang Bziuk
Key Generation for Secure High Speed Communication. Security and Management (2003)
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang, Sven Heithecker
An Area-Efficient Bit-Serial Integer Multiplier. VLSI (2003)
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang
Design of a Bit-Serial Floating Point Unit for a Fine Grained Parallel Processor Array. PDPTA (2003)
Viktor Bunimov, Manfred Schimmler
Efficient Parallel Multiplication Algorithm for Large Integres. Euro-Par (2003)
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
A hybrid architecture for bioinformatics. Future Gener. Comput. Syst. 18 (6) (2002)
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
Massively Parallel Solutions for Molecular Sequence Analysis. IPDPS (2002)
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
Protein Sequence Comparison on the Instruction Systolic Array. PaCT (2001)
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
Tomographic Image Reconstruction on the Instruction Systolic Array. Comput. Artif. Intell. 20 (1) (2001)
Bertil Schmidt, Heiko Schröder, Manfred Schimmler
Scanning Biosequence Databases on a Hybrid Parallel Architecture. Euro-Par (2001)
Manfred Schimmler
Architectures and Algorithms for Multimedia Applications. Euro-Par (2000)
Bertil Schmidt, Manfred Schimmler
KPROC - An Instruction Systolic Architecture for Parallel Prefix Applications. Scalable Comput. Pract. Exp. 3 (2) (2000)
Bertil Schmidt, Manfred Schimmler, Heiko Schröder
A Morphological Approach to Hough Transform on an Instruction Systolic Array. Comput. Artif. Intell. 18 (6) (1999)
Bertil Schmidt, Manfred Schimmler
A Parallel Accelerator Architecture for Multimedia Video Compression. Euro-Par (1999)
Bertil Schmidt, Manfred Schimmler, Heiko Schröder
Long Operand Arithmetic on Instruction Systolic Computer Architectures and Its Application in RSA Cryptography. Euro-Par (1998)
Bertil Schmidt, Manfred Schimmler, Heiko Schröder
Morphological Hough Transform on the Instruction Systolic Array. Euro-Par (1997)
Manfred Schimmler, Hans-Werner Lang, Rüdiger Maaß
The Instruction Systolic Array - Implementation of a Low-Cost Parallel Architecture as Add-On Board for Personal Computers. HPCN (1994)
Manfred Schimmler
Parallel strong orientation on a mesh connected computer. Parallel Comput. 17 (6-7) (1991)
Michael Phieler, Manfred Schimmler, Hartmut Schmeck
A Reconfigurable Instruction Systolic Array. Fault-Tolerant Computing Systems (1991)
Manfred Schimmler
Parallel strong orientation on a mesh connected computer. ASAP (1991)
Manfred Schimmler, Hartmut Schmeck
A Fault Tolerant and High Speed Instruction Systolic Array. VLSI (1991)
E. V. Krishnamurthy, Manfred Kunde, Manfred Schimmler, Heiko Schröder
Systolic algorithm for tensor products of matrices: implementation and applications. Parallel Comput. 13 (3) (1990)
Manfred Schimmler, Heiko Schröder
A simple systolic method to find all bridges of an undirected graph. Parallel Comput. 12 (1) (1989)
Manfred Schimmler, Christoph Starke
A Correction Network for N-Sorters. SIAM J. Comput. 18 (6) (1989)
Manfred Schimmler, Christoph Starke
A Correction Network for N-Sorters. AWOC (1988)
Manfred Kunde, Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
The instruction systolic array and its relation to other models of parallel computers. Parallel Comput. 7 (1) (1988)
Manfred Schimmler, Heiko Schröder
A Simple Systolic Method to Find all Bridges of an Undirected Graph. WG (1988)
Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
Systolic Sorting on a Mesh-Connected Network. IEEE Trans. Computers 34 (7) (1985)
Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
A Method for Realistic Comparisons of Sorting Algorithms for VLSI. FODO (1985)
Hans-Werner Lang, Manfred Schimmler, Hartmut Schmeck, Heiko Schröder
A Fast Sorting Algorithm for VLSI. ICALP (1983)

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Publication Activity (10 Years)

Top Topics

Top Venues

Manfred Schimmler