A Configuration Concept for a Massively Parallel FPGA Architecture.
Sandeep S. KumarChristof PaarJan PelzlGerd PfeifferManfred SchimmlerPublished in: CDES (2006)
Keyphrases
- massively parallel
- field programmable gate array
- processing elements
- hardware architecture
- parallel computers
- parallel computing
- fine grained
- hardware implementation
- software implementation
- reconfigurable hardware
- fpga technology
- hardware design
- high performance computing
- hardware architectures
- low cost
- fpga implementation
- fpga device
- pipelined architecture
- parallel architectures
- xilinx virtex
- mesh connected
- parallel architecture
- blue gene
- optimal solution
- efficient implementation
- pairwise