A Specification Methodology for the Optimal Layout of a 2-Stage Interconnect Bus for Massively Parallel Architectures.
Gerd PfeifferManfred SchimmlerPublished in: CDES (2008)
Keyphrases
- massively parallel
- high speed
- parallel architectures
- parallel computers
- fine grained
- parallel computing
- high performance computing
- dynamic programming
- optimal solution
- parallel machines
- parallel processing
- message passing interface
- processing elements
- cloud computing
- computer systems
- software engineering
- computational complexity