Manas Kumar Hati

Publication Activity (10 Years)

Years Active: 2011-2019
Publications (10 Years): 6

Top Topics

Charge Coupled Device

Fourier Coefficients

Top Venues

Microelectron. J.

Publications

Manas Kumar Hati, Tarun Kanti Bhattacharyya
A constant loop bandwidth in delta sigma fractional-N PLL frequency synthesizer with phase noise cancellation. Integr. 65 (2019)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
Phase noise analysis of proposed PFD and CP switching circuit and its advantages over various PFD/CP switching circuits in phase-locked loops. Integr. 63 (2018)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A New Open Loop Linearization Technique for Power Amplifier Circuit in MMIC for 5G Wireless Backhaul Application. TENCON (2018)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A High Power GaN MMIC 36.5 Watt X Band Power Amplifier. TENCON (2018)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A fast and efficient constant loop bandwidth with proposed PFD and pulse swallow divider circuit in ΔΣ fractional-N PLL frequency synthesizer. Microelectron. J. 61 (2017)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A fast automatic frequency and amplitude control LC-VCO circuit with noise filtering technique for a fractional-N PLL frequency synthesizer. Microelectron. J. 52 (2016)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
Efficient design technique for pulse swallow based fractional-N frequency divider. ISCAS (2015)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A 10-b, 500 MSPS current steering CMOS DAC with a switching current cell and high SFDR value. APCCAS (2014)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A high o/p resistance, wide swing and perfect current matching charge pump having switching circuit for PLL. Microelectron. J. 44 (8) (2013)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A High Speed, Low Jitter and Fast Acquisition CMOS Phase Frequency Detector for Charge Pump PLL. VDAT (2012)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
A 55-mW 300MS/s 8-bit CMOS Parallel Pipeline ADC. VLSI Design (2012)
Manas Kumar Hati, Tarun Kanti Bhattacharyya
Design of a Low Power, High Speed Complementary Input Folded Regulated Cascode OTA for a Parallel Pipeline ADC. ISVLSI (2011)