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A fast and efficient constant loop bandwidth with proposed PFD and pulse swallow divider circuit in ΔΣ fractional-N PLL frequency synthesizer.

Manas Kumar HatiTarun Kanti Bhattacharyya
Published in: Microelectron. J. (2017)
Keyphrases
  • high speed
  • computationally efficient
  • neural network
  • low cost
  • fourier coefficients
  • artificial neural networks
  • analog vlsi