Login / Signup
Lucas Antunes Tambara
Publication Activity (10 Years)
Years Active: 2017-2023
Publications (10 Years): 5
Top Topics
Design Space Exploration
Verilog Hdl
High Level Synthesis
Error Detection
Top Venues
ARC
LASCAS
DTTIS
</>
Publications
</>
Lucas Antunes Tambara
,
Pascal Masson
,
Julien Amouroux
,
Stéphane Monfray
,
Julien Dura
,
Frederic Gianesello
,
Julien Babic
,
Romain Debroucke
,
Loic Welter
,
Siddhartha Dhar
,
Bernadette Gros
,
Clement Charbuillet
,
Franck Julien
,
Guillaume Bertrand
,
Arnaud Régnier
,
Alain Fleury
Notched gate MOSFET for capacitance reduction in RF SOI technology.
DTTIS
(2023)
Ádria Barros de Oliveira
,
Lucas Antunes Tambara
,
Fernanda Lima Kastensmidt
Exploring Performance Overhead Versus Soft Error Detection in Lockstep Dual-Core ARM Cortex-A9 Processor Embedded into Xilinx Zynq APSoC.
ARC
(2017)
André Flores dos Santos
,
Lucas Antunes Tambara
,
Fabio Benevenuti
,
Jorge L. Tonfat
,
Fernanda Lima Kastensmidt
Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs.
ARC
(2017)
André Flores dos Santos
,
Lucas Antunes Tambara
,
Fernanda Lima Kastensmidt
Evaluating the efficiency of using TMR in the high-level synthesis design flow of SRAM-based FPGA.
LASCAS
(2017)
Ádria Barros de Oliveira
,
Lucas Antunes Tambara
,
Fernanda Lima Kastensmidt
Applying lockstep in dual-core ARM Cortex-A9 to mitigate radiation-induced soft errors.
LASCAS
(2017)