Kuan-Yueh James Shen

Publication Activity (10 Years)

Years Active: 2016-2023
Publications (10 Years): 6

Top Topics

Cmos Technology

Hardware And Software

Power Consumption

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Rachael J. Parker, Jyothi Bhaskarr Velamala, Kuan-Yueh James Shen, David Johnston, Yao-Feng Chang, Stephen M. Ramey, Siang-jhih Sean Wu, Padma Penmatsa
A Physical Unclonable Function Leveraging Hot Carrier Injection Aging. IRPS (2023)
Jyothi Bhaskarr Velamala, Siang-jhih Sean Wu, Padma Penmatsa, Kuan-Yueh James Shen, David Johnston, Rachael Parker
PVT Tolerant Zero Bit-Error-Rate Physical Unclonable Function Exploiting Hot Carrier Injection Aging in 7nm FinFET Technology. CICC (2022)
Praveen Mosalikanti, Qi Wang, Kuan-Yueh James Shen, Mark Neidengard, Syed Feruz Syed Farooq, Vaughn Grossnickle, Nasser A. Kurd
29.3 80ns Fast-Lock 0.4-to-6.5GHz Clock Generator with Self- Referenced Asynchronous Adaptive Droop Mitigation. ISSCC (2021)
Yongping Fan, Bo Xiang, Dan Zhang, James S. Ayers, Kuan-Yueh James Shen, Andrey Mezhiba
Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology. ISSCC (2019)
Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Mark Neidengard, Nasser A. Kurd, Amr Elshazly
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2018)
Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Amr Elshazly, Nasser A. Kurd
19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS. ISSCC (2016)