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Mark Neidengard
Publication Activity (10 Years)
Years Active: 2009-2021
Publications (10 Years): 2
Top Topics
High End
Delay Insensitive
Parallel Algorithm
Single Processor
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
ISSCC
IEEE J. Solid State Circuits
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Publications
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Praveen Mosalikanti
,
Qi Wang
,
Kuan-Yueh James Shen
,
Mark Neidengard
,
Syed Feruz Syed Farooq
,
Vaughn Grossnickle
,
Nasser A. Kurd
29.3 80ns Fast-Lock 0.4-to-6.5GHz Clock Generator with Self- Referenced Asynchronous Adaptive Droop Mitigation.
ISSCC
(2021)
Kuan-Yueh James Shen
,
Syed Feruz Syed Farooq
,
Yongping Fan
,
Khoa Minh Nguyen
,
Qi Wang
,
Mark Neidengard
,
Nasser A. Kurd
,
Amr Elshazly
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
(7) (2018)
Nasser A. Kurd
,
Muntaquim Chowdhury
,
Edward Burton
,
Thomas P. Thomas
,
Christopher Mozak
,
Brent Boswell
,
Praveen Mosalikanti
,
Mark Neidengard
,
Anant Deval
,
Ashish Khanna
,
Nasirul Chowdhury
,
Ravi Rajwar
,
Timothy M. Wilson
,
Rajesh Kumar
Haswell: A Family of IA 22 nm Processors.
IEEE J. Solid State Circuits
50 (1) (2015)
Nasser A. Kurd
,
Subramani Bhamidipati
,
Christopher Mozak
,
Jeffrey L. Miller
,
Praveen Mosalikanti
,
Timothy M. Wilson
,
Ali M. El-Husseini
,
Mark Neidengard
,
Ramy E. Aly
,
Mahadev Nemani
,
Muntaquim Chowdhury
,
Rajesh Kumar
A Family of 32 nm IA Processors.
IEEE J. Solid State Circuits
46 (1) (2011)
Nasser A. Kurd
,
Praveen Mosalikanti
,
Mark Neidengard
,
Jonathan Douglas
,
Rajesh Kumar
Next Generation Intel¯ Core™ Micro-Architecture (Nehalem) Clocking.
IEEE J. Solid State Circuits
44 (4) (2009)