19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS.
Kuan-Yueh James ShenSyed Feruz Syed FarooqYongping FanKhoa Minh NguyenQi WangAmr ElshazlyNasser A. KurdPublished in: ISSCC (2016)