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Koji Tsunoda
Publication Activity (10 Years)
Years Active: 2010-2016
Publications (10 Years): 2
Top Topics
Design Considerations
Random Access Memory
Co Occurrence
Dynamic Range
Top Venues
ASP-DAC
IPSJ Trans. Syst. LSI Des. Methodol.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
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Publications
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Yohei Umeki
,
Koji Yanagida
,
Shusuke Yoshimoto
,
Shintaro Izumi
,
Masahiko Yoshimoto
,
Hiroshi Kawaguchi
,
Koji Tsunoda
,
Toshihiro Sugii
A Counter-based Read Circuit Tolerant to Process Variation for 0.4-V Operating STT-MRAM.
IPSJ Trans. Syst. LSI Des. Methodol.
9 (2016)
Yohei Umeki
,
Koji Yanagida
,
Shusuke Yoshimoto
,
Shintaro Izumi
,
Masahiko Yoshimoto
,
Hiroshi Kawaguchi
,
Koji Tsunoda
,
Toshihiro Sugii
A negative-resistance sense amplifier for low-voltage operating STT-MRAM.
ASP-DAC
(2015)
Yohei Umeki
,
Koji Yanagida
,
Shusuke Yoshimoto
,
Shintaro Izumi
,
Masahiko Yoshimoto
,
Hiroshi Kawaguchi
,
Koji Tsunoda
,
Toshihiro Sugii
STT-MRAM Operating at 0.38V Using Negative-Resistance Sense Amplifier.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(12) (2014)
David Halupka
,
Safeen Huda
,
William Song
,
Ali Sheikholeslami
,
Koji Tsunoda
,
Chikako Yoshida
,
Masaki Aoki
Negative-resistance read and write schemes for STT-MRAM in 0.13µm CMOS.
ISSCC
(2010)