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Negative-resistance read and write schemes for STT-MRAM in 0.13µm CMOS.

David HalupkaSafeen HudaWilliam SongAli SheikholeslamiKoji TsunodaChikako YoshidaMasaki Aoki
Published in: ISSCC (2010)
Keyphrases
  • random access memory
  • read write
  • design considerations
  • positive and negative
  • low cost
  • analog vlsi
  • power consumption
  • disk drives
  • high speed
  • image sensor
  • power supply
  • circuit design
  • delay insensitive
  • write operations