Kimio Ueda

Publication Activity (10 Years)

Years Active: 1994-2002
Publications (10 Years): 0

Publications

Tsutomu Yoshimura, Kimio Ueda, Jun Takasoh, Yoshiki Wada, Toshihide Oka, Harufusa Kondoh, Osamu Chiba, Yoshihumi Azekawa, Masahiko Ishiwaki
A 10Gbase Ethernet transceiver (LAN PHY) in a 1.8 V, 0.18 μm SOI/CMOS technology. CICC (2002)
Toru Nakura, Kimio Ueda, Kazuo Kubo, Yoshio Matsuda, Koichiro Mashiko, Tsutomu Yoshihara
A 3.6-Gb/s 340-mW 16: 1 pipe-lined multiplexer using 0.18 μm SOI-CMOS technology. IEEE J. Solid State Circuits 35 (5) (2000)
Kimio Ueda, Nagisa Sasaki, Hisayasu Sato, Koichiro Mashiko
A fully compensated active pull-down ECL circuit with self-adjusting driving capability. IEEE J. Solid State Circuits 31 (1) (1996)
Hisayasu Sato, Kimio Ueda, Nagisa Sasaki, Tatsuhiko Ikeda, Koichiro Mashiko
A voltage compensated series-gate bipolar circuit operating at sub-2 V. IEEE J. Solid State Circuits 29 (10) (1994)