Kimia Zamiri Azar

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 43

Top Topics

Formal Verification

Hardware Designs

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Nusrat Farzana Dipu, Muhammad Monir Hossain, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor
FormalFuzzer: Formal Verification Assisted Fuzz Testing for SoC Vulnerability Detection. ASPDAC (2024)
Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark M. Tehranipoor, Farimah Farahmandi
Efficient SoC Security Monitoring: Quality Attributes and Potential Solutions. IEEE Des. Test 41 (4) (2024)
Bulbul Ahmed, M. Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor
SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation. ACM Great Lakes Symposium on VLSI (2024)
Nurun Nahar Mondol, Arash Vafaei, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor
RL-TPG: Automated Pre-Silicon Security Verification through Reinforcement Learning-Based Test Pattern Generation. DATE (2024)
Md Sami Ul Islam Sami, Tao Zhang, Amit Mazumder Shuvo, Md. Saad Ul Haque, Paul Calzada, Kimia Zamiri Azar, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration. IEEE Access 12 (2024)
Paul Calzada, Md Sami Ul Islam Sami, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
Heterogeneous Integration Supply Chain Integrity Through Blockchain and CHSM. ACM Trans. Design Autom. Electr. Syst. 29 (1) (2024)
Muhammad Monir Hossain, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
Fuzzing for Automated SoC Security Verification: Challenges and Solution. IEEE Des. Test 41 (4) (2024)
Tao Zhang, Md Latifur Rahman, Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi
SiPGuard: Run-Time System-in-Package Security Monitoring via Power Noise Variation. IEEE Trans. Very Large Scale Integr. Syst. 32 (2) (2024)
Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor
Improving Bounded Model Checkers Scalability for Circuit De-Obfuscation: An Exploration. IEEE Trans. Inf. Forensics Secur. 19 (2024)
Muhammad Monir Hossain, Nusrat Farzana Dipu, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
TaintFuzzer: SoC Security Verification using Taint Inference-enabled Fuzzing. ICCAD (2023)
Hasan Al Shaikh, Arash Vafaei, Mridha Md Mashahedur Rahman, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
SHarPen: SoC Security Verification by Hardware Penetration Test. ASP-DAC (2023)
Upoma Das, M. Sazadur Rahman, N. Nalla Anandakumar, Kimia Zamiri Azar, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi
PSC-Watermark: Power Side Channel Based IP Watermarking Using Clock Gates. ETS (2023)
Muhammad Monir Hossain, Arash Vafaei, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
SoCFuzzer: SoC Vulnerability Detection using Cost Function enabled Fuzz Testing. DATE (2023)
Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Farimah Farahmandi
EnSAFe: Enabling Sustainable SoC Security Auditing using eFPGA-based Accelerators. DFT (2023)
Mohammad Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Hadi Mardani Kamali
Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic Locking. ACM Great Lakes Symposium on VLSI (2023)
Hasan Al Shaikh, Mohammad Bin Monjil, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor, Fahim Rahman
QuardTropy: Detecting and Quantifying Unauthorized Information Leakage in Hardware Designs using g-entropy. DFT (2023)
Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor
SheLL: Shrinking eFPGA Fabrics for Logic Locking. DATE (2023)
Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor
Advances in Logic Locking: Past, Present, and Prospects. IACR Cryptol. ePrint Arch. 2022 (2022)
Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor
Warm Up before Circuit De-obfuscation? An Exploration through Bounded-Model-Checkers. HOST (2022)
Kimia Zamiri Azar, Muhammad Monir Hossain, Arash Vafaei, Hasan Al Shaikh, Nurun N. Mondol, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi
Fuzz, Penetration, and AI Testing for SoC Security Verification: Challenges and Solutions. IACR Cryptol. ePrint Arch. 2022 (2022)
Kimia Zamiri Azar, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, Christos P. Sotiriou, Avesta Sasan
Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits. IEEE Trans. Very Large Scale Integr. Syst. 29 (4) (2021)
Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
From Cryptography to Logic Locking: A Survey on the Architecture Evolution of Secure Scan Chains. IEEE Access 9 (2021)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
ChaoLock: Yet Another SAT-hard Logic Locking using Chaos Computing. ISQED (2021)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. ISVLSI (2020)
Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. CoRR (2020)
Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. ICCAD (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. CoRR (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
InterLock: An Intercorrelated Logic and Routing Locking. CoRR (2020)
Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. VTS (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
InterLock: An Intercorrelated Logic and Routing Locking. ICCAD (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. ACM Great Lakes Symposium on VLSI (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Shervin Roshanisefat, Ashkan Vakil, Avesta Sasan
ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things. CoRR (2020)
Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. CoRR (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. CoRR (2020)
Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
Full-Lock: Hard Distributions of SAT instances for Obfuscating Circuits using Fully Configurable Logic and Routing Blocks. DAC (2019)
Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
COMA: Communication and Obfuscation Management Architecture. RAID (2019)
Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
Threats on Logic Locking: A Decade Later. CoRR (2019)
Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
COMA: Communication and Obfuscation Management Architecture. CoRR (2019)
Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019 (1) (2019)
Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
Threats on Logic Locking: A Decade Later. ACM Great Lakes Symposium on VLSI (2019)
Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. ISVLSI (2018)
Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. CoRR (2018)
Hadi Mardani Kamali, Kimia Zamiri Azar, Shaahin Hessabi
DuCNoC: A High-Throughput FPGA-Based NoC Simulator Using Dual-Clock Lightweight Router Micro-Architecture. IEEE Trans. Computers 67 (2) (2018)