N. Nalla Anandakumar

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 16

Top Topics

Hardware Architecture

Key Agreement Protocol

Robust Watermarking

Top Venues

IACR Cryptol. ePrint Arch.

ACM Trans. Reconfigurable Technol. Syst.

Publications

Upoma Das, M. Sazadur Rahman, N. Nalla Anandakumar, Kimia Zamiri Azar, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi
PSC-Watermark: Power Side Channel Based IP Watermarking Using Clock Gates. ETS (2023)
Jungmin Park, N. Nalla Anandakumar, Dipayan Saha, Dhwani Mehta, Nitin Pundir, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor
PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms. IACR Cryptol. ePrint Arch. 2022 (2022)
N. Nalla Anandakumar, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Rasheed Kibria, Upoma Das, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor
Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs. IACR Cryptol. ePrint Arch. 2022 (2022)
N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya
Design and Analysis of FPGA-based PUFs with Enhanced Performance for Hardware-oriented Security. ACM J. Emerg. Technol. Comput. Syst. 18 (4) (2022)
N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya
Field Programmable Gate Array based elliptic curve Menezes-Qu-Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives. IET Circuits Devices Syst. 16 (5) (2022)
N. Nalla Anandakumar, Mohammad S. Hashmi, Muhammad Akmal Chaudhary
Implementation of Efficient XOR Arbiter PUF on FPGA With Enhanced Uniqueness and Security. IEEE Access 10 (2022)
Gani Kumisbek, N. Nalla Anandakumar, Mohammad S. Hashmi
FPGA Implementations of Espresso Stream Cipher. ICECS (2021)
N. Nalla Anandakumar, Mohammad S. Hashmi, Mark M. Tehranipoor
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures. Integr. 81 (2021)
R. Raja Adhithan, N. Nalla Anandakumar
Modeling Attacks and Efficient Countermeasures on Interpose PUF. FPS (2020)
N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya
Efficient and Lightweight FPGA-based Hybrid PUFs with Improved Performance. Microprocess. Microsystems 77 (2020)
N. Nalla Anandakumar, Somitra Kumar Sanadhya, Mohammad S. Hashmi
FPGA-Based True Random Number Generation Using Programmable Delays in Oscillator-Rings. IEEE Trans. Circuits Syst. II Express Briefs (3) (2020)
N. Nalla Anandakumar, Somitra Kumar Sanadhya, Mohammad S. Hashmi
Design, Implementation and Analysis of Efficient Hardware-Based Security Primitives. VLSI-SOC (2020)
Chintala Yehoshuva, R. Raja Adhithan, N. Nalla Anandakumar
A Survey of Security Attacks on Silicon Based Weak PUF Architectures. SSCC (2020)
N. Nalla Anandakumar, M. Prem Laxman Das, Somitra Kumar Sanadhya, Mohammad S. Hashmi
Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve. ACM Trans. Reconfigurable Technol. Syst. 11 (2) (2018)
Sivappriya Manivannan, N. Nalla Anandakumar, M. Nirmala Devi
Key Retrieval from AES Architecture Through Hardware Trojan Horse. SSCC (2018)
N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya
Compact Implementations of FPGA-based PUFs with Enhanced Performance. VLSI Design (2017)
N. Nalla Anandakumar
SCA Resistance Analysis on FPGA Implementations of Sponge Based \mathttMAC-\mathttPHOTON. SECITC (2015)
N. Nalla Anandakumar
SCA Resistance Analysis of MAC-PHOTON. IACR Cryptol. ePrint Arch. 2015 (2015)
N. Nalla Anandakumar, Thomas Peyrin, Axel Poschmann
A Very Compact FPGA Implementation of LED and PHOTON. INDOCRYPT (2014)
N. Nalla Anandakumar, Thomas Peyrin, Axel Poschmann
A Very Compact FPGA Implementation of LED and PHOTON. IACR Cryptol. ePrint Arch. 2014 (2014)
N. Nalla Anandakumar, S. Dillibabu
Correlation power analysis attack of AES on FPGA using customized communication protocol. CCSEIT (2012)