M. Nirmala Devi

Publication Activity (10 Years)

Years Active: 2008-2022
Publications (10 Years): 14

Top Topics

Malicious Attacks

Random Number Generator

Countermeasures

Transductive Learning

Top Venues

Mob. Networks Appl.

Publications

Paul Anu, N. Mohankumar, M. Nirmala Devi
Obviating Multiple Attacks with Enhanced Logic Locking. IC3 (2022)
Vaishnavi Sankar, M. Nirmala Devi, M. Jayakumar
Data Augmented Hardware Trojan Detection Using Label Spreading Algorithm Based Transductive Learning for Edge Computing-Assisted IoT Devices. IEEE Access 10 (2022)
M. I. Shiny, M. Nirmala Devi
Trustworthy Scan Design and Testability Using Obfuscation and Logic Locking Scheme for Wireless Network Application. Mob. Networks Appl. 27 (3) (2022)
M. Ganesan, R. Lavanya, M. Nirmala Devi
Fault detection in satellite power system using convolutional neural network. Telecommun. Syst. 76 (4) (2021)
M. Priyatharishini, M. Nirmala Devi
Realization of Re-configurable True Random Number Generator on FPGA. SSCC (2019)
R. Sree Ranjani, M. Nirmala Devi
Secured Hardware Design with Locker-Box Against a Key-Guessing Attacks. J. Low Power Electron. 15 (2) (2019)
Bandarupalli Chandini, M. Nirmala Devi
Analysis of Circuits for Security Using Logic Encryption. SSCC (2018)
S. Jaiyant Gopal, J. Ramnarayan, S. Kirthiga, M. Jayakumar, M. Nirmala Devi, R. Gandhiraj, Subhash Chandra Bera
Capacity Analysis of Correlated MIMO in GEOSAT Downlink Land Mobile System. ICACCI (2018)
Sree Ranjani Rajendran, M. Nirmala Devi
Enhanced Logical Locking for a Secured Hardware IP Against Key-Guessing Attacks. VDAT (2018)
Sivappriya Manivannan, N. Nalla Anandakumar, M. Nirmala Devi
Key Retrieval from AES Architecture Through Hardware Trojan Horse. SSCC (2018)
Sree Ranjani Rajendran, M. Nirmala Devi
A Novel Logical Locking Technique Against Key-Guessing Attacks. ISED (2018)
Arun Kumar Sundar Rajan, Armin Feucht, Lothar Gamer, Idriz Smaili, M. Nirmala Devi
Hypervisor for consolidating real-time automotive control units: Its procedure, implications and hidden pitfalls. J. Syst. Archit. 82 (2018)
K. Atchuta Sashank, Hari Sivarami Reddy, P. Pavithran, M. S. Akash, M. Nirmala Devi
Hardware Trojan Detection Using Effective Test Patterns and Selective Segmentation. SSCC (2017)
Rajat Subhra Chakraborty, Samuel Pagliarini, Jimson Mathew, Sree Ranjani Rajendran, M. Nirmala Devi
A Flexible Online Checking Technique to Enhance Hardware Trojan Horse Detectability by Reliability Analysis. IEEE Trans. Emerg. Top. Comput. 5 (2) (2017)
R. Bharath, G. Arun Sabari, Dhinesh Ravi Krishna, Arun Prasathe, K. Harish, N. Mohankumar, M. Nirmala Devi
Malicious Circuit Detection for Improved Hardware Security. SSCC (2015)
Eknadh Vaddi, Karthik Gaddam, Rahul Karthik Maniam, Sai Abhishek Mallavajjala, Srinivasulu Dasari, M. Nirmala Devi
Detection and Diagnosis of Hardware Trojan Using Power Analysis. SSCC (2015)
S. Sarathkrishna, Karthigha Balamurugan, M. Nirmala Devi, M. Jayakumar
Design and analysis of GaN HEMT based LNA with CPW matching. WOCN (2014)
Ramesh Bhakthavatchalu, Sreeja Krishnan, V. Vineeth, M. Nirmala Devi
Deterministic seed selection and pattern reduction in Logic BIST. VDAT (2014)
P. R. Sruthi, M. Nirmala Devi
A Modified Scheme for Simultaneous Reduction of Test Data Volume and Testing Power. VDAT (2012)
Nisha Haridas, M. Nirmala Devi
PSO learning on artificial neural networks. A2CWiC (2010)
Venakata Saichand, M. Nirmala Devi, S. Arumugam, N. Mohankumar
FPGA Realization of Activation Function for Artificial Neural Networks. ISDA (3) (2008)
N. Mohankumar, B. Bhuvan, M. Nirmala Devi, S. Arumugam
A Modified Genetic Algorithm for Evolution of Neural Network in Designing an Evolutionary Neuro-Hardware. GEM (2008)